[10:21:01.157] INFO: *** Welcome to pxar ***
[10:21:01.157] INFO: *** Today: 2016/12/29
[10:21:01.179] INFO: *** Version: v1.9.0-825-g6bc29
[10:21:01.179] INFO: readRocDacs: /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//dacParameters35_C0.dat .. /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//dacParameters35_C15.dat
[10:21:01.179] INFO: readTbmDacs: /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//tbmParameters_C0a.dat .. /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//tbmParameters_C0b.dat
[10:21:01.179] INFO: readMaskFile: /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//defaultMaskFile.dat
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 0
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 1
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 2
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 3
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 4
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 5
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 6
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 7
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 8
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 9
[10:21:01.179] INFO: MASKED Roc 3 col/row: 6 10
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 11
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 12
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 13
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 14
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 15
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 16
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 17
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 18
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 19
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 20
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 21
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 22
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 23
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 24
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 25
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 26
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 27
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 28
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 29
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 30
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 31
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 32
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 33
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 34
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 35
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 36
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 37
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 38
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 39
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 40
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 41
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 42
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 43
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 44
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 45
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 46
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 47
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 48
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 49
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 50
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 51
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 52
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 53
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 54
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 55
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 56
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 57
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 58
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 59
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 60
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 61
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 62
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 63
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 64
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 65
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 66
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 67
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 68
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 69
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 70
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 71
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 72
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 73
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 74
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 75
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 76
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 77
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 78
[10:21:01.180] INFO: MASKED Roc 3 col/row: 6 79
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 0
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 1
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 2
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 3
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 4
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 5
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 6
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 7
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 8
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 9
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 10
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 11
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 12
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 13
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 14
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 15
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 16
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 17
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 18
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 19
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 20
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 21
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 22
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 23
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 24
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 25
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 26
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 27
[10:21:01.180] INFO: MASKED Roc 3 col/row: 7 28
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 29
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 30
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 31
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 32
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 33
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 34
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 35
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 36
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 37
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 38
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 39
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 40
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 41
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 42
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 43
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 44
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 45
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 46
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 47
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 48
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 49
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 50
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 51
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 52
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 53
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 54
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 55
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 56
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 57
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 58
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 59
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 60
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 61
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 62
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 63
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 64
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 65
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 66
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 67
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 68
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 69
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 70
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 71
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 72
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 73
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 74
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 75
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 76
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 77
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 78
[10:21:01.181] INFO: MASKED Roc 3 col/row: 7 79
[10:21:01.181] INFO: readTrimFile: /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//trimParameters35_C0.dat .. /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//trimParameters35_C15.dat
[10:21:01.196] INFO: masking Roc 3 col/row: 6 0
[10:21:01.196] INFO: masking Roc 3 col/row: 6 1
[10:21:01.196] INFO: masking Roc 3 col/row: 6 2
[10:21:01.196] INFO: masking Roc 3 col/row: 6 3
[10:21:01.196] INFO: masking Roc 3 col/row: 6 4
[10:21:01.196] INFO: masking Roc 3 col/row: 6 5
[10:21:01.196] INFO: masking Roc 3 col/row: 6 6
[10:21:01.196] INFO: masking Roc 3 col/row: 6 7
[10:21:01.196] INFO: masking Roc 3 col/row: 6 8
[10:21:01.196] INFO: masking Roc 3 col/row: 6 9
[10:21:01.196] INFO: masking Roc 3 col/row: 6 10
[10:21:01.196] INFO: masking Roc 3 col/row: 6 11
[10:21:01.196] INFO: masking Roc 3 col/row: 6 12
[10:21:01.196] INFO: masking Roc 3 col/row: 6 13
[10:21:01.196] INFO: masking Roc 3 col/row: 6 14
[10:21:01.196] INFO: masking Roc 3 col/row: 6 15
[10:21:01.196] INFO: masking Roc 3 col/row: 6 16
[10:21:01.196] INFO: masking Roc 3 col/row: 6 17
[10:21:01.196] INFO: masking Roc 3 col/row: 6 18
[10:21:01.196] INFO: masking Roc 3 col/row: 6 19
[10:21:01.196] INFO: masking Roc 3 col/row: 6 20
[10:21:01.196] INFO: masking Roc 3 col/row: 6 21
[10:21:01.196] INFO: masking Roc 3 col/row: 6 22
[10:21:01.196] INFO: masking Roc 3 col/row: 6 23
[10:21:01.196] INFO: masking Roc 3 col/row: 6 24
[10:21:01.196] INFO: masking Roc 3 col/row: 6 25
[10:21:01.196] INFO: masking Roc 3 col/row: 6 26
[10:21:01.196] INFO: masking Roc 3 col/row: 6 27
[10:21:01.196] INFO: masking Roc 3 col/row: 6 28
[10:21:01.196] INFO: masking Roc 3 col/row: 6 29
[10:21:01.196] INFO: masking Roc 3 col/row: 6 30
[10:21:01.196] INFO: masking Roc 3 col/row: 6 31
[10:21:01.196] INFO: masking Roc 3 col/row: 6 32
[10:21:01.197] INFO: masking Roc 3 col/row: 6 33
[10:21:01.197] INFO: masking Roc 3 col/row: 6 34
[10:21:01.197] INFO: masking Roc 3 col/row: 6 35
[10:21:01.197] INFO: masking Roc 3 col/row: 6 36
[10:21:01.197] INFO: masking Roc 3 col/row: 6 37
[10:21:01.197] INFO: masking Roc 3 col/row: 6 38
[10:21:01.197] INFO: masking Roc 3 col/row: 6 39
[10:21:01.197] INFO: masking Roc 3 col/row: 6 40
[10:21:01.197] INFO: masking Roc 3 col/row: 6 41
[10:21:01.197] INFO: masking Roc 3 col/row: 6 42
[10:21:01.197] INFO: masking Roc 3 col/row: 6 43
[10:21:01.197] INFO: masking Roc 3 col/row: 6 44
[10:21:01.197] INFO: masking Roc 3 col/row: 6 45
[10:21:01.197] INFO: masking Roc 3 col/row: 6 46
[10:21:01.197] INFO: masking Roc 3 col/row: 6 47
[10:21:01.197] INFO: masking Roc 3 col/row: 6 48
[10:21:01.197] INFO: masking Roc 3 col/row: 6 49
[10:21:01.197] INFO: masking Roc 3 col/row: 6 50
[10:21:01.197] INFO: masking Roc 3 col/row: 6 51
[10:21:01.197] INFO: masking Roc 3 col/row: 6 52
[10:21:01.197] INFO: masking Roc 3 col/row: 6 53
[10:21:01.197] INFO: masking Roc 3 col/row: 6 54
[10:21:01.197] INFO: masking Roc 3 col/row: 6 55
[10:21:01.197] INFO: masking Roc 3 col/row: 6 56
[10:21:01.197] INFO: masking Roc 3 col/row: 6 57
[10:21:01.197] INFO: masking Roc 3 col/row: 6 58
[10:21:01.197] INFO: masking Roc 3 col/row: 6 59
[10:21:01.197] INFO: masking Roc 3 col/row: 6 60
[10:21:01.197] INFO: masking Roc 3 col/row: 6 61
[10:21:01.197] INFO: masking Roc 3 col/row: 6 62
[10:21:01.197] INFO: masking Roc 3 col/row: 6 63
[10:21:01.197] INFO: masking Roc 3 col/row: 6 64
[10:21:01.197] INFO: masking Roc 3 col/row: 6 65
[10:21:01.197] INFO: masking Roc 3 col/row: 6 66
[10:21:01.197] INFO: masking Roc 3 col/row: 6 67
[10:21:01.197] INFO: masking Roc 3 col/row: 6 68
[10:21:01.197] INFO: masking Roc 3 col/row: 6 69
[10:21:01.197] INFO: masking Roc 3 col/row: 6 70
[10:21:01.197] INFO: masking Roc 3 col/row: 6 71
[10:21:01.197] INFO: masking Roc 3 col/row: 6 72
[10:21:01.197] INFO: masking Roc 3 col/row: 6 73
[10:21:01.197] INFO: masking Roc 3 col/row: 6 74
[10:21:01.197] INFO: masking Roc 3 col/row: 6 75
[10:21:01.197] INFO: masking Roc 3 col/row: 6 76
[10:21:01.197] INFO: masking Roc 3 col/row: 6 77
[10:21:01.197] INFO: masking Roc 3 col/row: 6 78
[10:21:01.197] INFO: masking Roc 3 col/row: 6 79
[10:21:01.197] INFO: masking Roc 3 col/row: 7 0
[10:21:01.197] INFO: masking Roc 3 col/row: 7 1
[10:21:01.197] INFO: masking Roc 3 col/row: 7 2
[10:21:01.197] INFO: masking Roc 3 col/row: 7 3
[10:21:01.197] INFO: masking Roc 3 col/row: 7 4
[10:21:01.197] INFO: masking Roc 3 col/row: 7 5
[10:21:01.197] INFO: masking Roc 3 col/row: 7 6
[10:21:01.197] INFO: masking Roc 3 col/row: 7 7
[10:21:01.197] INFO: masking Roc 3 col/row: 7 8
[10:21:01.197] INFO: masking Roc 3 col/row: 7 9
[10:21:01.197] INFO: masking Roc 3 col/row: 7 10
[10:21:01.197] INFO: masking Roc 3 col/row: 7 11
[10:21:01.197] INFO: masking Roc 3 col/row: 7 12
[10:21:01.197] INFO: masking Roc 3 col/row: 7 13
[10:21:01.197] INFO: masking Roc 3 col/row: 7 14
[10:21:01.201] INFO: masking Roc 3 col/row: 7 15
[10:21:01.201] INFO: masking Roc 3 col/row: 7 16
[10:21:01.201] INFO: masking Roc 3 col/row: 7 17
[10:21:01.201] INFO: masking Roc 3 col/row: 7 18
[10:21:01.201] INFO: masking Roc 3 col/row: 7 19
[10:21:01.201] INFO: masking Roc 3 col/row: 7 20
[10:21:01.201] INFO: masking Roc 3 col/row: 7 21
[10:21:01.201] INFO: masking Roc 3 col/row: 7 22
[10:21:01.201] INFO: masking Roc 3 col/row: 7 23
[10:21:01.201] INFO: masking Roc 3 col/row: 7 24
[10:21:01.201] INFO: masking Roc 3 col/row: 7 25
[10:21:01.201] INFO: masking Roc 3 col/row: 7 26
[10:21:01.201] INFO: masking Roc 3 col/row: 7 27
[10:21:01.201] INFO: masking Roc 3 col/row: 7 28
[10:21:01.201] INFO: masking Roc 3 col/row: 7 29
[10:21:01.201] INFO: masking Roc 3 col/row: 7 30
[10:21:01.201] INFO: masking Roc 3 col/row: 7 31
[10:21:01.201] INFO: masking Roc 3 col/row: 7 32
[10:21:01.201] INFO: masking Roc 3 col/row: 7 33
[10:21:01.201] INFO: masking Roc 3 col/row: 7 34
[10:21:01.202] INFO: masking Roc 3 col/row: 7 35
[10:21:01.202] INFO: masking Roc 3 col/row: 7 36
[10:21:01.202] INFO: masking Roc 3 col/row: 7 37
[10:21:01.202] INFO: masking Roc 3 col/row: 7 38
[10:21:01.202] INFO: masking Roc 3 col/row: 7 39
[10:21:01.202] INFO: masking Roc 3 col/row: 7 40
[10:21:01.202] INFO: masking Roc 3 col/row: 7 41
[10:21:01.202] INFO: masking Roc 3 col/row: 7 42
[10:21:01.202] INFO: masking Roc 3 col/row: 7 43
[10:21:01.202] INFO: masking Roc 3 col/row: 7 44
[10:21:01.202] INFO: masking Roc 3 col/row: 7 45
[10:21:01.202] INFO: masking Roc 3 col/row: 7 46
[10:21:01.202] INFO: masking Roc 3 col/row: 7 47
[10:21:01.202] INFO: masking Roc 3 col/row: 7 48
[10:21:01.202] INFO: masking Roc 3 col/row: 7 49
[10:21:01.202] INFO: masking Roc 3 col/row: 7 50
[10:21:01.202] INFO: masking Roc 3 col/row: 7 51
[10:21:01.202] INFO: masking Roc 3 col/row: 7 52
[10:21:01.202] INFO: masking Roc 3 col/row: 7 53
[10:21:01.202] INFO: masking Roc 3 col/row: 7 54
[10:21:01.202] INFO: masking Roc 3 col/row: 7 55
[10:21:01.202] INFO: masking Roc 3 col/row: 7 56
[10:21:01.202] INFO: masking Roc 3 col/row: 7 57
[10:21:01.202] INFO: masking Roc 3 col/row: 7 58
[10:21:01.202] INFO: masking Roc 3 col/row: 7 59
[10:21:01.202] INFO: masking Roc 3 col/row: 7 60
[10:21:01.202] INFO: masking Roc 3 col/row: 7 61
[10:21:01.202] INFO: masking Roc 3 col/row: 7 62
[10:21:01.202] INFO: masking Roc 3 col/row: 7 63
[10:21:01.202] INFO: masking Roc 3 col/row: 7 64
[10:21:01.202] INFO: masking Roc 3 col/row: 7 65
[10:21:01.202] INFO: masking Roc 3 col/row: 7 66
[10:21:01.202] INFO: masking Roc 3 col/row: 7 67
[10:21:01.202] INFO: masking Roc 3 col/row: 7 68
[10:21:01.202] INFO: masking Roc 3 col/row: 7 69
[10:21:01.202] INFO: masking Roc 3 col/row: 7 70
[10:21:01.202] INFO: masking Roc 3 col/row: 7 71
[10:21:01.202] INFO: masking Roc 3 col/row: 7 72
[10:21:01.202] INFO: masking Roc 3 col/row: 7 73
[10:21:01.202] INFO: masking Roc 3 col/row: 7 74
[10:21:01.202] INFO: masking Roc 3 col/row: 7 75
[10:21:01.202] INFO: masking Roc 3 col/row: 7 76
[10:21:01.202] INFO: masking Roc 3 col/row: 7 77
[10:21:01.202] INFO: masking Roc 3 col/row: 7 78
[10:21:01.202] INFO: masking Roc 3 col/row: 7 79
[10:21:01.258] INFO: clk: 4
[10:21:01.258] INFO: ctr: 4
[10:21:01.258] INFO: sda: 19
[10:21:01.258] INFO: tin: 9
[10:21:01.258] INFO: level: 15
[10:21:01.258] INFO: triggerdelay: 0
[10:21:01.258] QUIET: Instanciating API for pxar v1.9.0+825~g6bc290c
[10:21:01.258] INFO: Log level: DEBUG
[10:21:01.276] QUIET: Connection to board DTB_WREKRL opened.
[10:21:01.279] INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 33
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WREKRL
MAC address: 40D855118021
Hostname: pixelDTB033
Comment:
------------------------------------------------------
[10:21:01.282] INFO: RPC call hashes of host and DTB match: 398089610
[10:21:02.817] INFO: DUT info:
[10:21:02.817] INFO: The DUT currently contains the following objects:
[10:21:02.817] INFO: 2 TBM Cores tbm08c (2 ON)
[10:21:02.817] INFO: TBM Core alpha (0): 7 registers set
[10:21:02.817] INFO: TBM Core beta (1): 7 registers set
[10:21:02.817] INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:21:02.817] INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 3: 19 DACs set, Pixels: 160 masked, 0 active.
[10:21:02.817] INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.817] INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.818] INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.818] INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB<-
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> dumpall: checkbox(0)
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> dumpproblematic: checkbox(0)
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 5
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> vcals: 250
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB2<-
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> vcals: 222
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> plwidth: 35
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> targetia: 24
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB3<-
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> dumpall: checkbox(0)
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> dumpproblematic: checkbox(0)
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 5
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> vcals: 250
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB4<-
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> savecaldelscan: checkbox(0)
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 100
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> cals: 1
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> caldello: 80
[10:21:02.818] DEBUG: <PixTestParameters.cc/dump:L107> caldelhi: 200
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> caldelstep: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> vthrcomplo: 70
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> vthrcomphi: 130
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> vthrcompstep: 5
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> noisypixels: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 255
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> cut: 0.5
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Cmd<-
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->DacDacScan<-
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> phmap: checkbox
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac1: caldel
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac1lo: 0
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac1hi: 255
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac2: vthrcomp
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac2lo: 0
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac2hi: 255
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->DacScan<-
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> phmap: checkbox(1)
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> allpixels: checkbox(0)
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> unmasked: checkbox(0)
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dac: vcal
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> daclo: 0
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dachi: 255
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->GainPedestal<-
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> showfits: checkbox(0)
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> extended: checkbox(0)
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> dumphists: checkbox(0)
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> vcalstep: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> measure: button
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> fit: button
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> save: button
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->HighRate<-
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> trimhotpixels: button
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> trimhotpixelthr: 200
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> runsecondshotpixels: 10
[10:21:02.819] DEBUG: <PixTestParameters.cc/dump:L107> savetrimbits: checkbox(1)
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> maskuntrimmable: checkbox(1)
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> maskhotpixels: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> savemaskfile: checkbox(0)
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> maskfilename: default
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> caldelscan: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> xpixelalive: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 50
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 200
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> xnoisemaps: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> daclo: 0
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> dachi: 100
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> dacs/step: 20
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> rundaq: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> trgfrequency(khz): 20
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> runseconds: 2
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> triggerdelay: 20
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> delaytbm: checkbox
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> filltree: checkbox
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->IV<-
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> port: /dev/FIXME
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> voltagestart: 0
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> voltagestop: 600
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> voltagestep: 5
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> delay: 1
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> compliance(ua): 100
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->PhOptimization<-
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> safetymarginlow: 20
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> saturationvcal: 100
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> quantilesaturation: 0.98
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->PixelAlive<-
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> phmap: checkbox(0)
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 200
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> alivetest: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> masktest: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> addressdecodingtest: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Pretest<-
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> programroc: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> checkidig: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> targetia: 24
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> setvana: button
[10:21:02.820] DEBUG: <PixTestParameters.cc/dump:L107> iterations: 100
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> settimings: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> findtiming: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> findworkingpixel: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> setvthrcompcaldel: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 250
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> deltavthrcomp: 50
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> fraccaldel: 0.5
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 5
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> savedacs: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Readback<-
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> calibratevd: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> calibrateva: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> calibrateia: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> readbackvbg: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> getcalibratedvbg: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> usecalvd: checkbox(1)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> usecalva: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> setvana: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Scurves<-
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> adjustvcal: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> dumpall: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> dumpproblematic: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> dumpoutputfile: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 50
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> dac: Vcal
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> daclo: 0
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> dachi: 200
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> dacs/step: -1
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> ntrig/step: -1
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> scurves: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Timing<-
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> targetclk: 4
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10000
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> clocksdascan: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> notokenpass: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> ignorereadback: checkbox(0)
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> phasescan: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> levelscan: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> tbmphasescan: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> rocdelayscan: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> timingtest: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> saveparameters: button
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Trim<-
[10:21:02.821] DEBUG: <PixTestParameters.cc/dump:L107> trim: button
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 8
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 35
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> trimbits: button
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Xray<-
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> maskhotpixels: button
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> savemaskfile: checkbox(0)
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> maskfilename: default
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> source: Ag
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> phrun: button
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> runseconds: 100
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> trgfrequency(khz): 100
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> ratescan: button
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> vthrcompmin: 10
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> vthrcompmax: 80
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> stepseconds: 5
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> delaytbm: checkbox
[10:21:02.822] DEBUG: <PixTestParameters.cc/dump:L107> filltree: checkbox
[10:21:02.824] DEBUG: <PixSetup.cc/init:L81> PixSetup init start; getCurrentRSS() = 29057024
[10:21:02.824] DEBUG: <PixSetup.cc/init:L87> fPixTestParameters = 0x1b2b730
[10:21:02.824] DEBUG: <PixSetup.cc/init:L88> fConfigParameters = 0x1a51310
[10:21:02.824] DEBUG: <PixSetup.cc/init:L89> fPxarMemory = 0x7f1cc1d94010
[10:21:02.824] DEBUG: <PixSetup.cc/init:L90> fPxarMemHi = 0x7f1cc7fff510
[10:21:02.824] DEBUG: <PixSetup.cc/init:L106> PixSetup init done; getCurrentRSS() = 29122560 fPxarMemory = 0x7f1cc1d94010
[10:21:02.833] DEBUG: <pXar.cc/main:L223> Initial Analog Current: 381.9mA
[10:21:02.834] DEBUG: <pXar.cc/main:L224> Initial Digital Current: 464.7mA
[10:21:02.834] DEBUG: <pXar.cc/main:L225> Initial Module Temperature: 2.1 C
[10:21:02.834] DEBUG: <PixTestFactory.cc/PixTestFactory:L53> PixTestFactory::PixTestFactory()
[10:21:03.235] INFO: enter 'restricted' command line mode
[10:21:03.235] INFO: enter test to run
[10:21:10.097] INFO: test: PixelAlive no parameter change
[10:21:10.097] INFO: running: pixelalive
[10:21:10.097] DEBUG: <PixTestAlive.cc/init:L83> PixTestAlive::init()
[10:21:10.101] DEBUG: <PixTestAlive.cc/PixTestAlive:L21> PixTestAlive ctor(PixSetup &a, string, TGTab *)
[10:21:10.101] DEBUG: <PixTestAlive.cc/runCommand:L62> running command: alivetest
[10:21:10.105] INFO: ----------------------------------------------------------------------
[10:21:10.105] INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:21:10.105] INFO: ----------------------------------------------------------------------
[10:21:10.108] INFO: ROC 3 masking pixel 6/0
[10:21:10.109] INFO: ROC 3 masking pixel 6/1
[10:21:10.109] INFO: ROC 3 masking pixel 6/2
[10:21:10.109] INFO: ROC 3 masking pixel 6/3
[10:21:10.109] INFO: ROC 3 masking pixel 6/4
[10:21:10.109] INFO: ROC 3 masking pixel 6/5
[10:21:10.109] INFO: ROC 3 masking pixel 6/6
[10:21:10.109] INFO: ROC 3 masking pixel 6/7
[10:21:10.109] INFO: ROC 3 masking pixel 6/8
[10:21:10.109] INFO: ROC 3 masking pixel 6/9
[10:21:10.109] INFO: ROC 3 masking pixel 6/10
[10:21:10.109] INFO: ROC 3 masking pixel 6/11
[10:21:10.109] INFO: ROC 3 masking pixel 6/12
[10:21:10.109] INFO: ROC 3 masking pixel 6/13
[10:21:10.109] INFO: ROC 3 masking pixel 6/14
[10:21:10.109] INFO: ROC 3 masking pixel 6/15
[10:21:10.109] INFO: ROC 3 masking pixel 6/16
[10:21:10.109] INFO: ROC 3 masking pixel 6/17
[10:21:10.109] INFO: ROC 3 masking pixel 6/18
[10:21:10.109] INFO: ROC 3 masking pixel 6/19
[10:21:10.109] INFO: ROC 3 masking pixel 6/20
[10:21:10.109] INFO: ROC 3 masking pixel 6/21
[10:21:10.109] INFO: ROC 3 masking pixel 6/22
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[10:21:10.109] INFO: ROC 3 masking pixel 6/24
[10:21:10.109] INFO: ROC 3 masking pixel 6/25
[10:21:10.110] INFO: ROC 3 masking pixel 6/26
[10:21:10.110] INFO: ROC 3 masking pixel 6/27
[10:21:10.110] INFO: ROC 3 masking pixel 6/28
[10:21:10.110] INFO: ROC 3 masking pixel 6/29
[10:21:10.110] INFO: ROC 3 masking pixel 6/30
[10:21:10.110] INFO: ROC 3 masking pixel 6/31
[10:21:10.110] INFO: ROC 3 masking pixel 6/32
[10:21:10.110] INFO: ROC 3 masking pixel 6/33
[10:21:10.110] INFO: ROC 3 masking pixel 6/34
[10:21:10.110] INFO: ROC 3 masking pixel 6/35
[10:21:10.110] INFO: ROC 3 masking pixel 6/36
[10:21:10.110] INFO: ROC 3 masking pixel 6/37
[10:21:10.110] INFO: ROC 3 masking pixel 6/38
[10:21:10.110] INFO: ROC 3 masking pixel 6/39
[10:21:10.110] INFO: ROC 3 masking pixel 6/40
[10:21:10.110] INFO: ROC 3 masking pixel 6/41
[10:21:10.110] INFO: ROC 3 masking pixel 6/42
[10:21:10.110] INFO: ROC 3 masking pixel 6/43
[10:21:10.110] INFO: ROC 3 masking pixel 6/44
[10:21:10.111] INFO: ROC 3 masking pixel 6/45
[10:21:10.111] INFO: ROC 3 masking pixel 6/46
[10:21:10.111] INFO: ROC 3 masking pixel 6/47
[10:21:10.111] INFO: ROC 3 masking pixel 6/48
[10:21:10.111] INFO: ROC 3 masking pixel 6/49
[10:21:10.111] INFO: ROC 3 masking pixel 6/50
[10:21:10.111] INFO: ROC 3 masking pixel 6/51
[10:21:10.111] INFO: ROC 3 masking pixel 6/52
[10:21:10.111] INFO: ROC 3 masking pixel 6/53
[10:21:10.111] INFO: ROC 3 masking pixel 6/54
[10:21:10.111] INFO: ROC 3 masking pixel 6/55
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[10:21:10.111] INFO: ROC 3 masking pixel 6/57
[10:21:10.111] INFO: ROC 3 masking pixel 6/58
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[10:21:10.111] INFO: ROC 3 masking pixel 6/61
[10:21:10.111] INFO: ROC 3 masking pixel 6/62
[10:21:10.111] INFO: ROC 3 masking pixel 6/63
[10:21:10.111] INFO: ROC 3 masking pixel 6/64
[10:21:10.111] INFO: ROC 3 masking pixel 6/65
[10:21:10.111] INFO: ROC 3 masking pixel 6/66
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[10:21:10.114] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:21:10.426] INFO: Expecting 41600 events.
[10:21:14.771] INFO: 41600 events read in total (3626ms).
[10:21:14.939] INFO: Test took 4825ms.
[10:21:14.953] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:14.953] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 66395
[10:21:14.953] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists PixelAlive_C0 .. PixelAlive_C15
[10:21:15.220] INFO: PixTestAlive::aliveTest() done
[10:21:15.220] INFO: number of dead pixels (per ROC): 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
[10:21:15.220] DEBUG: <PixTestAlive.cc/aliveTest:L199> number of red-efficiency pixels: 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
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[10:21:15.224] DEBUG: <PixTestAlive.cc/~PixTestAlive:L115> PixTestAlive dtor
[10:21:15.251] INFO: enter test to run
[10:21:21.905] INFO: test: timing no parameter change
[10:21:21.905] INFO: running: timing
[10:21:21.905] DEBUG: <PixTestTiming.cc/setParameter:L59> PixTestTiming::PixTest() targetclk = 4
[10:21:21.905] DEBUG: <PixTestTiming.cc/setParameter:L63> PixTestTiming::PixTest() ntrig = 10000
[10:21:21.905] DEBUG: <PixTestTiming.cc/setParameter:L47> fNoTokenPass: 0
[10:21:21.905] DEBUG: <PixTestTiming.cc/setParameter:L54> fIgnoreReadBack: 0
[10:21:21.905] DEBUG: <PixTestTiming.cc/init:L73> PixTestTiming::init()
[10:21:21.908] INFO: ######################################################################
[10:21:21.908] INFO: PixTestTiming::doTest()
[10:21:21.908] INFO: ######################################################################
[10:21:21.908] INFO: ----------------------------------------------------------------------
[10:21:21.908] INFO: PixTestTiming::TBMPhaseScan()
[10:21:21.908] INFO: ----------------------------------------------------------------------
[10:21:21.908] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 0 TBM Phase: 00000000
[10:21:23.927] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 1 TBM Phase: 00000100
[10:21:26.318] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 2 TBM Phase: 00001000
[10:21:28.708] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 3 TBM Phase: 00001100
[10:21:31.101] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 4 TBM Phase: 00010000
[10:21:33.492] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 5 TBM Phase: 00010100
[10:21:35.885] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 6 TBM Phase: 00011000
[10:21:38.277] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 0 400MHz Phase: 7 TBM Phase: 00011100
[10:21:40.670] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 0 TBM Phase: 00100000
[10:21:43.063] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 1 TBM Phase: 00100100
[10:21:45.455] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 2 TBM Phase: 00101000
[10:21:47.846] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 3 TBM Phase: 00101100
[10:21:50.236] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 4 TBM Phase: 00110000
[10:21:52.630] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 5 TBM Phase: 00110100
[10:21:55.022] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 6 TBM Phase: 00111000
[10:21:57.415] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 1 400MHz Phase: 7 TBM Phase: 00111100
[10:21:59.806] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 0 TBM Phase: 01000000
[10:22:01.331] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 1 TBM Phase: 01000100
[10:22:02.852] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 2 TBM Phase: 01001000
[10:22:04.376] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 3 TBM Phase: 01001100
[10:22:05.899] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 4 TBM Phase: 01010000
[10:22:07.421] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 5 TBM Phase: 01010100
[10:22:08.944] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 6 TBM Phase: 01011000
[10:22:10.466] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 2 400MHz Phase: 7 TBM Phase: 01011100
[10:22:11.990] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 0 TBM Phase: 01100000
[10:22:14.266] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 1 TBM Phase: 01100100
[10:22:15.791] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 2 TBM Phase: 01101000
[10:22:17.315] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 3 TBM Phase: 01101100
[10:22:18.840] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 4 TBM Phase: 01110000
[10:22:20.365] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 5 TBM Phase: 01110100
[10:22:21.890] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 6 TBM Phase: 01111000
[10:22:23.414] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 3 400MHz Phase: 7 TBM Phase: 01111100
[10:22:24.937] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 0 TBM Phase: 10000000
[10:22:26.460] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 1 TBM Phase: 10000100
[10:22:27.985] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 2 TBM Phase: 10001000
[10:22:29.508] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 3 TBM Phase: 10001100
[10:22:31.032] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 4 TBM Phase: 10010000
[10:22:32.552] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 5 TBM Phase: 10010100
[10:22:34.078] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 6 TBM Phase: 10011000
[10:22:35.600] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 4 400MHz Phase: 7 TBM Phase: 10011100
[10:22:37.124] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 0 TBM Phase: 10100000
[10:22:39.518] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 1 TBM Phase: 10100100
[10:22:41.911] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 2 TBM Phase: 10101000
[10:22:44.304] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 3 TBM Phase: 10101100
[10:22:46.697] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 4 TBM Phase: 10110000
[10:22:49.088] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 5 TBM Phase: 10110100
[10:22:51.481] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 6 TBM Phase: 10111000
[10:22:53.871] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 5 400MHz Phase: 7 TBM Phase: 10111100
[10:22:56.264] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 0 TBM Phase: 11000000
[10:22:58.656] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 1 TBM Phase: 11000100
[10:23:01.047] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 2 TBM Phase: 11001000
[10:23:03.441] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 3 TBM Phase: 11001100
[10:23:05.831] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 4 TBM Phase: 11010000
[10:23:08.226] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 5 TBM Phase: 11010100
[10:23:10.618] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 6 TBM Phase: 11011000
[10:23:13.010] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 6 400MHz Phase: 7 TBM Phase: 11011100
[10:23:15.402] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 0 TBM Phase: 11100000
[10:23:17.792] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 1 TBM Phase: 11100100
[10:23:20.185] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 2 TBM Phase: 11101000
[10:23:22.577] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 3 TBM Phase: 11101100
[10:23:24.968] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 4 TBM Phase: 11110000
[10:23:27.360] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 5 TBM Phase: 11110100
[10:23:29.750] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 6 TBM Phase: 11111000
[10:23:32.141] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 0 160MHz Phase: 7 400MHz Phase: 7 TBM Phase: 11111100
[10:23:34.535] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 0 TBM Phase: 00000000
[10:23:36.931] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 1 TBM Phase: 00000100
[10:23:39.325] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 2 TBM Phase: 00001000
[10:23:41.721] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 3 TBM Phase: 00001100
[10:23:44.115] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 4 TBM Phase: 00010000
[10:23:46.511] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 5 TBM Phase: 00010100
[10:23:48.905] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 6 TBM Phase: 00011000
[10:23:51.298] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 0 400MHz Phase: 7 TBM Phase: 00011100
[10:23:53.693] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 0 TBM Phase: 00100000
[10:23:56.088] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 1 TBM Phase: 00100100
[10:23:58.486] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 2 TBM Phase: 00101000
[10:24:00.880] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 3 TBM Phase: 00101100
[10:24:03.274] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 4 TBM Phase: 00110000
[10:24:05.669] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 5 TBM Phase: 00110100
[10:24:08.067] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 6 TBM Phase: 00111000
[10:24:10.461] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 1 400MHz Phase: 7 TBM Phase: 00111100
[10:24:12.855] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 0 TBM Phase: 01000000
[10:24:14.567] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 1 TBM Phase: 01000100
[10:24:16.091] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 2 TBM Phase: 01001000
[10:24:17.614] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 3 TBM Phase: 01001100
[10:24:19.134] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 4 TBM Phase: 01010000
[10:24:20.659] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 5 TBM Phase: 01010100
[10:24:22.179] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 6 TBM Phase: 01011000
[10:24:23.704] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 2 400MHz Phase: 7 TBM Phase: 01011100
[10:24:25.227] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 0 TBM Phase: 01100000
[10:24:26.750] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 1 TBM Phase: 01100100
[10:24:28.272] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 2 TBM Phase: 01101000
[10:24:29.797] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 3 TBM Phase: 01101100
[10:24:31.320] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 4 TBM Phase: 01110000
[10:24:32.844] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 5 TBM Phase: 01110100
[10:24:34.367] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 6 TBM Phase: 01111000
[10:24:35.888] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 3 400MHz Phase: 7 TBM Phase: 01111100
[10:24:37.411] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 0 TBM Phase: 10000000
[10:24:38.937] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 1 TBM Phase: 10000100
[10:24:40.459] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 2 TBM Phase: 10001000
[10:24:41.982] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 3 TBM Phase: 10001100
[10:24:43.505] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 4 TBM Phase: 10010000
[10:24:45.028] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 5 TBM Phase: 10010100
[10:24:46.551] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 6 TBM Phase: 10011000
[10:24:48.075] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 4 400MHz Phase: 7 TBM Phase: 10011100
[10:24:49.597] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 0 TBM Phase: 10100000
[10:24:51.994] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 1 TBM Phase: 10100100
[10:24:54.389] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 2 TBM Phase: 10101000
[10:24:56.783] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 3 TBM Phase: 10101100
[10:24:59.180] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 4 TBM Phase: 10110000
[10:25:01.576] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 5 TBM Phase: 10110100
[10:25:03.970] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 6 TBM Phase: 10111000
[10:25:06.366] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 5 400MHz Phase: 7 TBM Phase: 10111100
[10:25:08.762] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 0 TBM Phase: 11000000
[10:25:11.157] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 1 TBM Phase: 11000100
[10:25:13.552] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 2 TBM Phase: 11001000
[10:25:15.947] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 3 TBM Phase: 11001100
[10:25:18.343] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 4 TBM Phase: 11010000
[10:25:20.737] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 5 TBM Phase: 11010100
[10:25:23.133] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 6 TBM Phase: 11011000
[10:25:25.530] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 6 400MHz Phase: 7 TBM Phase: 11011100
[10:25:27.924] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 0 TBM Phase: 11100000
[10:25:30.320] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 1 TBM Phase: 11100100
[10:25:32.715] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 2 TBM Phase: 11101000
[10:25:35.112] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 3 TBM Phase: 11101100
[10:25:37.506] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 4 TBM Phase: 11110000
[10:25:39.900] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 5 TBM Phase: 11110100
[10:25:42.298] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 6 TBM Phase: 11111000
[10:25:44.692] DEBUG: <PixTestTiming.cc/TBMPhaseScan:L435> TBM Core: 1 160MHz Phase: 7 400MHz Phase: 7 TBM Phase: 11111100
[10:25:47.472] INFO: TBM Phase Settings: 236
[10:25:47.472] INFO: 400MHz Phase: 3
[10:25:47.472] INFO: 160MHz Phase: 7
[10:25:47.472] INFO: Functional Phase Area: 4
[10:25:47.475] INFO: Test took 265567 ms.
[10:25:47.475] INFO: PixTestTiming::TBMPhaseScan() done.
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[10:25:47.480] INFO: ----------------------------------------------------------------------
[10:25:47.480] INFO: PixTestTiming::ROCDelayScan()
[10:25:47.480] INFO: ----------------------------------------------------------------------
[10:25:47.480] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 0 ROCDelay Setting: 11000000
[10:25:48.627] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 1 ROCDelay Setting: 11000001
[10:25:51.279] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 2 ROCDelay Setting: 11000010
[10:25:53.932] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 3 ROCDelay Setting: 11000011
[10:25:56.584] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 4 ROCDelay Setting: 11000100
[10:25:59.236] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 5 ROCDelay Setting: 11000101
[10:26:01.889] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 6 ROCDelay Setting: 11000110
[10:26:04.540] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 0 ROC Port0: 7 ROCDelay Setting: 11000111
[10:26:07.193] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 0 ROCDelay Setting: 11001000
[10:26:08.714] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 1 ROCDelay Setting: 11001001
[10:26:10.239] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 2 ROCDelay Setting: 11001010
[10:26:11.763] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 3 ROCDelay Setting: 11001011
[10:26:13.286] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 4 ROCDelay Setting: 11001100
[10:26:14.810] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 5 ROCDelay Setting: 11001101
[10:26:16.332] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 6 ROCDelay Setting: 11001110
[10:26:17.857] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 1 ROC Port0: 7 ROCDelay Setting: 11001111
[10:26:19.380] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 0 ROCDelay Setting: 11010000
[10:26:20.903] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 1 ROCDelay Setting: 11010001
[10:26:22.426] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 2 ROCDelay Setting: 11010010
[10:26:24.847] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 3 ROCDelay Setting: 11010011
[10:26:27.272] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 4 ROCDelay Setting: 11010100
[10:26:29.695] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 5 ROCDelay Setting: 11010101
[10:26:32.120] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 6 ROCDelay Setting: 11010110
[10:26:34.543] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 2 ROC Port0: 7 ROCDelay Setting: 11010111
[10:26:36.065] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 0 ROCDelay Setting: 11011000
[10:26:37.589] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 1 ROCDelay Setting: 11011001
[10:26:39.112] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 2 ROCDelay Setting: 11011010
[10:26:41.535] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 3 ROCDelay Setting: 11011011
[10:26:43.957] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 4 ROCDelay Setting: 11011100
[10:26:46.383] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 5 ROCDelay Setting: 11011101
[10:26:48.806] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 6 ROCDelay Setting: 11011110
[10:26:51.232] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 3 ROC Port0: 7 ROCDelay Setting: 11011111
[10:26:52.752] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 0 ROCDelay Setting: 11100000
[10:26:54.277] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 1 ROCDelay Setting: 11100001
[10:26:55.799] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 2 ROCDelay Setting: 11100010
[10:26:58.223] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 3 ROCDelay Setting: 11100011
[10:27:00.648] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 4 ROCDelay Setting: 11100100
[10:27:03.071] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 5 ROCDelay Setting: 11100101
[10:27:05.494] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 6 ROCDelay Setting: 11100110
[10:27:07.918] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 4 ROC Port0: 7 ROCDelay Setting: 11100111
[10:27:09.441] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 0 ROCDelay Setting: 11101000
[10:27:10.964] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 1 ROCDelay Setting: 11101001
[10:27:12.488] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 2 ROCDelay Setting: 11101010
[10:27:14.912] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 3 ROCDelay Setting: 11101011
[10:27:17.335] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 4 ROCDelay Setting: 11101100
[10:27:19.760] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 5 ROCDelay Setting: 11101101
[10:27:22.184] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 6 ROCDelay Setting: 11101110
[10:27:24.607] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 5 ROC Port0: 7 ROCDelay Setting: 11101111
[10:27:26.130] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 0 ROCDelay Setting: 11110000
[10:27:27.653] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 1 ROCDelay Setting: 11110001
[10:27:29.176] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 2 ROCDelay Setting: 11110010
[10:27:31.601] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 3 ROCDelay Setting: 11110011
[10:27:34.025] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 4 ROCDelay Setting: 11110100
[10:27:36.448] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 5 ROCDelay Setting: 11110101
[10:27:38.873] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 6 ROCDelay Setting: 11110110
[10:27:41.298] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 6 ROC Port0: 7 ROCDelay Setting: 11110111
[10:27:42.822] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 0 ROCDelay Setting: 11111000
[10:27:44.345] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 1 ROCDelay Setting: 11111001
[10:27:45.868] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 2 ROCDelay Setting: 11111010
[10:27:47.391] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 3 ROCDelay Setting: 11111011
[10:27:48.915] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 4 ROCDelay Setting: 11111100
[10:27:50.439] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 5 ROCDelay Setting: 11111101
[10:27:51.960] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 6 ROCDelay Setting: 11111110
[10:27:53.483] DEBUG: <PixTestTiming.cc/ROCDelayScan:L546> Token Header/Trailer Delay: 11 ROC Port1: 7 ROC Port0: 7 ROCDelay Setting: 11111111
[10:27:55.389] INFO: ROC Delay Settings: 228
[10:27:55.390] INFO: ROC Header-Trailer/Token Delay: 11
[10:27:55.390] INFO: ROC Port 0 Delay: 4
[10:27:55.390] INFO: ROC Port 1 Delay: 4
[10:27:55.390] INFO: Functional ROC Area: 5
[10:27:55.393] INFO: Test took 127913 ms.
[10:27:55.393] INFO: PixTestTiming::ROCDelayScan() done.
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[10:27:55.397] INFO: ----------------------------------------------------------------------
[10:27:55.397] INFO: PixTestTiming::TimingTest()
[10:27:55.397] INFO: ----------------------------------------------------------------------
[10:27:56.539] DEBUG: <PixTest.cc/getEvents:L2459> Event: ====== 0 ====== a001 80b1 4838 4838 4838 4838 4838 4838 4838 4838 e062 c000 a101 80b1 4838 4838 4838 4838 4838 4838 4838 4838 e062 c000
[10:27:56.540] DEBUG: <PixTest.cc/getEvents:L2459> Event: ====== 0 ====== a002 80c0 4838 4838 4838 4838 4838 4838 4838 4838 e022 c000 a102 80c0 4838 4838 4838 4838 4838 4838 4838 4838 e022 c000
[10:27:56.540] DEBUG: <PixTest.cc/getEvents:L2459> Event: ====== 0 ====== a003 8000 4838 4838 4838 4838 4838 4838 4838 4838 e022 c000 a103 8000 4838 4838 4838 4838 4838 4838 4838 4838 e022 c000
[10:27:56.540] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 1000000/10000000 Triggers
[10:28:11.731] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:11.731] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 2000000/10000000 Triggers
[10:28:27.017] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:27.017] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 3000000/10000000 Triggers
[10:28:42.088] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:42.088] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 4000000/10000000 Triggers
[10:28:57.197] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:57.197] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 5000000/10000000 Triggers
[10:29:12.291] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:12.291] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 6000000/10000000 Triggers
[10:29:27.361] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:27.361] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 7000000/10000000 Triggers
[10:29:42.460] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:42.461] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 8000000/10000000 Triggers
[10:29:57.601] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:57.601] DEBUG: <PixTest.cc/getEvents:L2463> Collecting 9000000/10000000 Triggers
[10:30:12.722] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:12.723] DEBUG: <PixTest.cc/getEvents:L2470> Collecting 10000000/10000000 Triggers
[10:30:27.700] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:28.078] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:28.095] INFO: Decoding statistics:
[10:30:28.095] INFO: General information:
[10:30:28.095] INFO: 16bit words read: 240000000
[10:30:28.095] INFO: valid events total: 20000000
[10:30:28.095] INFO: empty events: 20000000
[10:30:28.095] INFO: valid events with pixels: 0
[10:30:28.095] INFO: valid pixel hits: 0
[10:30:28.095] INFO: Event errors: 0
[10:30:28.095] INFO: start marker: 0
[10:30:28.095] INFO: stop marker: 0
[10:30:28.095] INFO: overflow: 0
[10:30:28.095] INFO: invalid 5bit words: 0
[10:30:28.095] INFO: invalid XOR eye diagram: 0
[10:30:28.095] INFO: TBM errors: 0
[10:30:28.095] INFO: flawed TBM headers: 0
[10:30:28.095] INFO: flawed TBM trailers: 0
[10:30:28.095] INFO: event ID mismatches: 0
[10:30:28.095] INFO: ROC errors: 0
[10:30:28.095] INFO: missing ROC header(s): 0
[10:30:28.095] INFO: misplaced readback start: 0
[10:30:28.095] INFO: Pixel decoding errors: 0
[10:30:28.095] INFO: pixel data incomplete: 0
[10:30:28.095] INFO: pixel address: 0
[10:30:28.095] INFO: pulse height fill bit: 0
[10:30:28.095] INFO: buffer corruption: 0
[10:30:28.095] INFO: ----------------------------------------------------------------------
[10:30:28.095] INFO: The fraction of properly decoded events is 100.00%: 10000000/10000000
[10:30:28.095] INFO: ----------------------------------------------------------------------
[10:30:28.095] INFO: ----------------------------------------------------------------------
[10:30:28.095] INFO: Read back bit status: 1
[10:30:28.095] INFO: ----------------------------------------------------------------------
[10:30:28.095] INFO: ----------------------------------------------------------------------
[10:30:28.095] INFO: Timings are good!
[10:30:28.095] INFO: ----------------------------------------------------------------------
[10:30:28.095] INFO: Test took 152698 ms.
[10:30:28.095] INFO: PixTestTiming::TimingTest() done.
[10:30:28.095] INFO: ROC 3 masking pixel 6/0
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[10:30:28.097] INFO: write tbm parameters into /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//tbmParameters_C0a.dat
[10:30:28.097] INFO: write tbm parameters into /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//tbmParameters_C0b.dat
[10:30:28.097] INFO: PixTestTiming::doTest took 546192 ms.
[10:30:28.097] INFO: PixTestTiming::doTest() done
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[10:30:28.107] DEBUG: <PixTestTiming.cc/~PixTestTiming:L96> PixTestTiming dtor
[10:30:28.107] INFO: Write out TBMPhaseScan_0_V0
[10:30:28.108] INFO: Write out TBMPhaseScan_1_V0
[10:30:28.108] INFO: Write out CombinedTBMPhaseScan_V0
[10:30:28.109] INFO: Write out ROCDelayScan3_V0
[10:30:28.109] INFO: enter test to run
[10:31:05.645] INFO: test: PixelAlive no parameter change
[10:31:05.645] INFO: running: pixelalive
[10:31:05.645] DEBUG: <PixTestAlive.cc/init:L83> PixTestAlive::init()
[10:31:05.645] DEBUG: <PixTestAlive.cc/PixTestAlive:L21> PixTestAlive ctor(PixSetup &a, string, TGTab *)
[10:31:05.645] DEBUG: <PixTestAlive.cc/runCommand:L62> running command: alivetest
[10:31:05.649] INFO: ----------------------------------------------------------------------
[10:31:05.649] INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:31:05.649] INFO: ----------------------------------------------------------------------
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[10:31:05.655] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:31:05.971] INFO: Expecting 41600 events.
[10:31:10.327] INFO: 41600 events read in total (3641ms).
[10:31:10.327] INFO: Test took 4672ms.
[10:31:10.334] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:10.334] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 66395
[10:31:10.334] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists PixelAlive_C0 .. PixelAlive_C15
[10:31:10.726] INFO: PixTestAlive::aliveTest() done
[10:31:10.726] INFO: number of dead pixels (per ROC): 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
[10:31:10.726] DEBUG: <PixTestAlive.cc/aliveTest:L199> number of red-efficiency pixels: 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
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[10:31:10.732] DEBUG: <PixTestAlive.cc/~PixTestAlive:L115> PixTestAlive dtor
[10:31:10.735] INFO: enter test to run
[10:32:07.165] INFO: test: Xray setting parameters: ->source=DCLowRate<-
[10:32:07.165] DEBUG: <PixTestParameters.cc/setTestParameter:L119> PixTestParameters: ->Xray<-
[10:32:07.165] DEBUG: <PixTestParameters.cc/setTestParameter:L124> setting source to new value DCLowRate
[10:32:07.165] INFO: running: xray
[10:32:07.165] DEBUG: <PixTestXray.cc/init:L135> PixTestXray::init()
[10:32:07.165] DEBUG: <PixTestXray.cc/PixTestXray:L28> PixTestXray ctor(PixSetup &a, string, TGTab *)
[10:32:07.165] INFO: readGainPedestalParameters /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//phCalibrationFitErr35_C0.dat .. /home/uicpirepix2/ProductionTestResults/M-P-3-21_FPIXTest-17C-FNAL-161026-1405-150V_2016-10-26_14h05m_1477508717/000_FPIXTest_p17//phCalibrationFitErr35_C15.dat
[10:32:07.317] DEBUG: <PixTestXray.cc/runCommand:L109> running command: phrun
[10:32:07.317] INFO: ----------------------------------------------------------------------
[10:32:07.317] INFO: PixTestXray::doPhRun() fParRunSeconds = 100
[10:32:07.317] INFO: ----------------------------------------------------------------------
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[10:32:08.290] INFO: PixTestXray::doPhRun start TriggerLoop with trigger frequency 100 kHz, period 405 and duration 100 seconds, fEventsMax = 10000000
[10:32:19.825] INFO: run duration 11 seconds, buffer almost full (81%), pausing triggers.
[10:32:19.828] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:32:45.631] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136438 events.
[10:32:49.473] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136438, pixels seen in all events: 6613480
[10:32:49.503] INFO: Resuming triggers.
[10:33:01.043] INFO: run duration 22 seconds, buffer almost full (81%), pausing triggers.
[10:33:01.046] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:33:27.094] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136836 events.
[10:33:30.693] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136836, pixels seen in all events: 6609007
[10:33:30.767] INFO: Resuming triggers.
[10:33:42.302] INFO: run duration 34 seconds, buffer almost full (81%), pausing triggers.
[10:33:42.306] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:34:07.914] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136390 events.
[10:34:11.456] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136390, pixels seen in all events: 6614079
[10:34:11.576] INFO: Resuming triggers.
[10:34:23.114] INFO: run duration 45 seconds, buffer almost full (81%), pausing triggers.
[10:34:23.118] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:34:48.691] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136649 events.
[10:34:52.251] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136649, pixels seen in all events: 6611479
[10:34:52.372] INFO: Resuming triggers.
[10:35:03.908] INFO: run duration 57 seconds, buffer almost full (81%), pausing triggers.
[10:35:03.912] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:35:29.574] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136444 events.
[10:35:33.126] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136444, pixels seen in all events: 6613632
[10:35:33.248] INFO: Resuming triggers.
[10:35:44.785] INFO: run duration 68 seconds, buffer almost full (81%), pausing triggers.
[10:35:44.789] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:36:10.423] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136643 events.
[10:36:13.957] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136643, pixels seen in all events: 6611278
[10:36:14.079] INFO: Resuming triggers.
[10:36:25.612] INFO: run duration 80 seconds, buffer almost full (81%), pausing triggers.
[10:36:25.615] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:36:51.125] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1136114 events.
[10:36:54.753] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1136114, pixels seen in all events: 6618146
[10:36:54.827] INFO: Resuming triggers.
[10:37:06.357] INFO: run duration 91 seconds, buffer almost full (81%), pausing triggers.
[10:37:06.361] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:37:31.973] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1135855 events.
[10:37:35.507] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1135855, pixels seen in all events: 6621199
[10:37:35.627] INFO: Resuming triggers.
[10:37:43.703] INFO: data taking finished, elapsed time: 100 seconds.
[10:37:43.899] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:38:01.791] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 795542 events.
[10:38:04.253] DEBUG: <PixTestXray.cc/processData:L823> # events read: 795542, pixels seen in all events: 4634840
[10:38:04.311] INFO: PixTest:: pg_setup set to default.
[10:38:04.314] INFO: PixTestXray::doPhRun() done
[10:38:04.314] DEBUG: <PixTestXray.cc/~PixTestXray:L218> PixTestXray dtor
[10:38:04.449] INFO: enter test to run
[10:38:30.978] INFO: test: Xray setting parameters: ->source=DCHighRate<-
[10:38:30.978] DEBUG: <PixTestParameters.cc/setTestParameter:L119> PixTestParameters: ->Xray<-
[10:38:30.978] DEBUG: <PixTestParameters.cc/setTestParameter:L124> setting source to new value DCHighRate
[10:38:30.978] INFO: running: xray
[10:38:30.978] DEBUG: <PixTestXray.cc/init:L135> PixTestXray::init()
[10:38:30.978] DEBUG: <PixTestXray.cc/PixTestXray:L28> PixTestXray ctor(PixSetup &a, string, TGTab *)
[10:38:30.979] DEBUG: <PixTestXray.cc/runCommand:L109> running command: phrun
[10:38:30.979] INFO: ----------------------------------------------------------------------
[10:38:30.979] INFO: PixTestXray::doPhRun() fParRunSeconds = 100
[10:38:30.979] INFO: ----------------------------------------------------------------------
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[10:38:31.948] INFO: PixTestXray::doPhRun start TriggerLoop with trigger frequency 100 kHz, period 405 and duration 100 seconds, fEventsMax = 10000000
[10:38:38.664] INFO: run duration 6 seconds, buffer almost full (81%), pausing triggers.
[10:38:38.667] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:39:02.303] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661656 events.
[10:39:08.744] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661656, pixels seen in all events: 12312648
[10:39:08.808] INFO: Resuming triggers.
[10:39:15.526] INFO: run duration 13 seconds, buffer almost full (81%), pausing triggers.
[10:39:15.529] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:39:39.055] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661790 events.
[10:39:45.511] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661790, pixels seen in all events: 12310003
[10:39:45.575] INFO: Resuming triggers.
[10:39:52.294] INFO: run duration 20 seconds, buffer almost full (81%), pausing triggers.
[10:39:52.297] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:40:15.993] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661905 events.
[10:40:22.387] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661905, pixels seen in all events: 12308545
[10:40:22.450] INFO: Resuming triggers.
[10:40:29.172] INFO: run duration 26 seconds, buffer almost full (81%), pausing triggers.
[10:40:29.175] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:40:52.751] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 662160 events.
[10:40:59.269] DEBUG: <PixTestXray.cc/processData:L823> # events read: 662160, pixels seen in all events: 12306535
[10:40:59.333] INFO: Resuming triggers.
[10:41:06.052] INFO: run duration 33 seconds, buffer almost full (81%), pausing triggers.
[10:41:06.055] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:41:30.251] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661857 events.
[10:41:37.362] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661857, pixels seen in all events: 12310111
[10:41:37.427] INFO: Resuming triggers.
[10:41:44.149] INFO: run duration 40 seconds, buffer almost full (81%), pausing triggers.
[10:41:44.153] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:42:08.010] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 662185 events.
[10:42:15.114] DEBUG: <PixTestXray.cc/processData:L823> # events read: 662185, pixels seen in all events: 12306157
[10:42:15.181] INFO: Resuming triggers.
[10:42:21.900] INFO: run duration 46 seconds, buffer almost full (81%), pausing triggers.
[10:42:21.903] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:42:45.645] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661938 events.
[10:42:52.684] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661938, pixels seen in all events: 12309026
[10:42:52.750] INFO: Resuming triggers.
[10:42:59.466] INFO: run duration 53 seconds, buffer almost full (81%), pausing triggers.
[10:42:59.470] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:43:23.027] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661599 events.
[10:43:30.333] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661599, pixels seen in all events: 12312023
[10:43:30.402] INFO: Resuming triggers.
[10:43:37.123] INFO: run duration 60 seconds, buffer almost full (81%), pausing triggers.
[10:43:37.126] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:44:00.287] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 662079 events.
[10:44:07.624] DEBUG: <PixTestXray.cc/processData:L823> # events read: 662079, pixels seen in all events: 12307418
[10:44:07.692] INFO: Resuming triggers.
[10:44:14.412] INFO: run duration 66 seconds, buffer almost full (81%), pausing triggers.
[10:44:14.415] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:44:38.032] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661966 events.
[10:44:45.082] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661966, pixels seen in all events: 12307909
[10:44:45.150] INFO: Resuming triggers.
[10:44:51.866] INFO: run duration 73 seconds, buffer almost full (81%), pausing triggers.
[10:44:51.869] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:45:16.280] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661594 events.
[10:45:23.334] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661594, pixels seen in all events: 12313039
[10:45:23.409] INFO: Resuming triggers.
[10:45:30.123] INFO: run duration 80 seconds, buffer almost full (81%), pausing triggers.
[10:45:30.126] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:45:54.431] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661389 events.
[10:46:00.850] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661389, pixels seen in all events: 12315419
[10:46:00.915] INFO: Resuming triggers.
[10:46:07.628] INFO: run duration 87 seconds, buffer almost full (81%), pausing triggers.
[10:46:07.632] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:46:31.376] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661290 events.
[10:46:37.816] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661290, pixels seen in all events: 12316373
[10:46:37.881] INFO: Resuming triggers.
[10:46:44.598] INFO: run duration 93 seconds, buffer almost full (81%), pausing triggers.
[10:46:44.601] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:47:08.266] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 661669 events.
[10:47:14.681] DEBUG: <PixTestXray.cc/processData:L823> # events read: 661669, pixels seen in all events: 12311365
[10:47:14.745] INFO: Resuming triggers.
[10:47:21.067] INFO: data taking finished, elapsed time: 100 seconds.
[10:47:21.263] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[10:47:43.673] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 622834 events.
[10:47:49.838] DEBUG: <PixTestXray.cc/processData:L823> # events read: 622834, pixels seen in all events: 11600684
[10:47:49.898] INFO: PixTest:: pg_setup set to default.
[10:47:49.901] INFO: PixTestXray::doPhRun() done
[10:47:49.901] DEBUG: <PixTestXray.cc/~PixTestXray:L218> PixTestXray dtor
[10:47:50.050] INFO: enter test to run
[10:48:06.654] INFO: test: HighRate no parameter change
[10:48:06.654] INFO: running: highrate
[10:48:06.654] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[10:48:06.654] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[10:48:06.654] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[10:48:06.668] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: caldelscan
[10:48:06.668] INFO: ----------------------------------------------------------------------
[10:48:06.668] INFO: PixTestHighRate::calDelScan() ntrig = 10, vcal = 200
[10:48:06.668] INFO: ----------------------------------------------------------------------
[10:48:06.812] INFO: Expecting 768 events.
[10:48:07.947] INFO: 768 events read in total (419ms).
[10:48:07.947] INFO: Test took 1269ms.
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[10:48:07.960] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:08.750] INFO: Expecting 41600 events.
[10:48:11.869] INFO: 41600 events read in total (2592ms).
[10:48:11.870] INFO: Test took 3910ms.
[10:48:11.902] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:11.902] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 300817
[10:48:11.902] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step0_C0 .. HR_xeff_CalDelScan_step0_C15
[10:48:11.902] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:11.920] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:12.629] INFO: Expecting 41600 events.
[10:48:15.827] INFO: 41600 events read in total (2671ms).
[10:48:15.828] INFO: Test took 3908ms.
[10:48:15.862] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:15.862] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 307589
[10:48:15.862] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step1_C0 .. HR_xeff_CalDelScan_step1_C15
[10:48:15.862] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:15.879] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:16.588] INFO: Expecting 41600 events.
[10:48:19.831] INFO: 41600 events read in total (2716ms).
[10:48:19.832] INFO: Test took 3953ms.
[10:48:19.865] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:19.865] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 309127
[10:48:19.865] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step2_C0 .. HR_xeff_CalDelScan_step2_C15
[10:48:19.865] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:19.883] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:20.591] INFO: Expecting 41600 events.
[10:48:23.837] INFO: 41600 events read in total (2719ms).
[10:48:23.838] INFO: Test took 3955ms.
[10:48:23.871] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:23.871] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 307954
[10:48:23.871] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step3_C0 .. HR_xeff_CalDelScan_step3_C15
[10:48:23.871] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:23.889] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:24.595] INFO: Expecting 41600 events.
[10:48:27.835] INFO: 41600 events read in total (2713ms).
[10:48:27.836] INFO: Test took 3947ms.
[10:48:27.869] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:27.869] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308395
[10:48:27.869] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step4_C0 .. HR_xeff_CalDelScan_step4_C15
[10:48:27.869] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:27.886] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:28.595] INFO: Expecting 41600 events.
[10:48:31.842] INFO: 41600 events read in total (2721ms).
[10:48:31.843] INFO: Test took 3957ms.
[10:48:31.875] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:31.875] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308500
[10:48:31.875] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step5_C0 .. HR_xeff_CalDelScan_step5_C15
[10:48:31.875] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:31.892] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:32.601] INFO: Expecting 41600 events.
[10:48:35.854] INFO: 41600 events read in total (2726ms).
[10:48:35.855] INFO: Test took 3963ms.
[10:48:35.887] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:35.887] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308906
[10:48:35.887] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step6_C0 .. HR_xeff_CalDelScan_step6_C15
[10:48:35.888] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:35.904] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:36.616] INFO: Expecting 41600 events.
[10:48:39.858] INFO: 41600 events read in total (2715ms).
[10:48:39.859] INFO: Test took 3955ms.
[10:48:39.891] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:39.891] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308050
[10:48:39.891] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step7_C0 .. HR_xeff_CalDelScan_step7_C15
[10:48:39.892] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:39.909] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:40.618] INFO: Expecting 41600 events.
[10:48:43.864] INFO: 41600 events read in total (2719ms).
[10:48:43.865] INFO: Test took 3955ms.
[10:48:43.898] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:43.898] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308163
[10:48:43.898] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step8_C0 .. HR_xeff_CalDelScan_step8_C15
[10:48:43.898] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:43.916] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:44.621] INFO: Expecting 41600 events.
[10:48:47.873] INFO: 41600 events read in total (2725ms).
[10:48:47.874] INFO: Test took 3958ms.
[10:48:47.907] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:47.907] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308773
[10:48:47.907] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step9_C0 .. HR_xeff_CalDelScan_step9_C15
[10:48:47.908] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:47.925] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:48.631] INFO: Expecting 41600 events.
[10:48:51.882] INFO: 41600 events read in total (2724ms).
[10:48:51.883] INFO: Test took 3958ms.
[10:48:51.916] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:51.916] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 309493
[10:48:51.916] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step10_C0 .. HR_xeff_CalDelScan_step10_C15
[10:48:51.917] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:51.935] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:52.641] INFO: Expecting 41600 events.
[10:48:55.809] INFO: 41600 events read in total (2641ms).
[10:48:55.810] INFO: Test took 3875ms.
[10:48:55.844] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:55.844] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308458
[10:48:55.844] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step11_C0 .. HR_xeff_CalDelScan_step11_C15
[10:48:55.844] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:55.861] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:48:56.570] INFO: Expecting 41600 events.
[10:48:59.813] INFO: 41600 events read in total (2716ms).
[10:48:59.814] INFO: Test took 3953ms.
[10:48:59.847] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:59.847] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308771
[10:48:59.847] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step12_C0 .. HR_xeff_CalDelScan_step12_C15
[10:48:59.847] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:48:59.865] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:00.570] INFO: Expecting 41600 events.
[10:49:03.825] INFO: 41600 events read in total (2728ms).
[10:49:03.826] INFO: Test took 3961ms.
[10:49:03.858] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:03.858] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 309188
[10:49:03.858] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step13_C0 .. HR_xeff_CalDelScan_step13_C15
[10:49:03.859] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:03.877] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:04.586] INFO: Expecting 41600 events.
[10:49:07.841] INFO: 41600 events read in total (2728ms).
[10:49:07.842] INFO: Test took 3965ms.
[10:49:07.875] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:07.875] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308400
[10:49:07.875] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step14_C0 .. HR_xeff_CalDelScan_step14_C15
[10:49:07.875] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:07.893] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:08.600] INFO: Expecting 41600 events.
[10:49:11.849] INFO: 41600 events read in total (2722ms).
[10:49:11.850] INFO: Test took 3957ms.
[10:49:11.883] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:11.883] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308543
[10:49:11.883] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step15_C0 .. HR_xeff_CalDelScan_step15_C15
[10:49:11.884] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:11.902] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:12.606] INFO: Expecting 41600 events.
[10:49:15.857] INFO: 41600 events read in total (2724ms).
[10:49:15.858] INFO: Test took 3956ms.
[10:49:15.891] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:15.891] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308912
[10:49:15.891] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step16_C0 .. HR_xeff_CalDelScan_step16_C15
[10:49:15.891] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:15.909] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:16.613] INFO: Expecting 41600 events.
[10:49:19.867] INFO: 41600 events read in total (2727ms).
[10:49:19.868] INFO: Test took 3958ms.
[10:49:19.901] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:19.901] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 307566
[10:49:19.901] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step17_C0 .. HR_xeff_CalDelScan_step17_C15
[10:49:19.901] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:19.919] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:20.628] INFO: Expecting 41600 events.
[10:49:23.851] INFO: 41600 events read in total (2696ms).
[10:49:23.852] INFO: Test took 3933ms.
[10:49:23.885] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:23.885] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 307976
[10:49:23.885] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step18_C0 .. HR_xeff_CalDelScan_step18_C15
[10:49:23.885] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:23.904] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:24.612] INFO: Expecting 41600 events.
[10:49:27.691] INFO: 41600 events read in total (2552ms).
[10:49:27.692] INFO: Test took 3788ms.
[10:49:27.724] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:27.724] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 304173
[10:49:27.724] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step19_C0 .. HR_xeff_CalDelScan_step19_C15
[10:49:27.725] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:49:28.065] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 0: caldel = 157 eff = 0.999736
[10:49:28.065] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 1: caldel = 137 eff = 0.99988
[10:49:28.066] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 2: caldel = 159 eff = 0.999663
[10:49:28.066] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 3: caldel = 166 eff = 0.961106
[10:49:28.066] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 4: caldel = 152 eff = 0.999471
[10:49:28.066] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 5: caldel = 143 eff = 0.999519
[10:49:28.066] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 6: caldel = 137 eff = 0.999495
[10:49:28.066] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 7: caldel = 140 eff = 0.999591
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 8: caldel = 147 eff = 0.999327
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 9: caldel = 139 eff = 0.999615
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 10: caldel = 163 eff = 0.999519
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 11: caldel = 158 eff = 0.998389
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 12: caldel = 170 eff = 0.999615
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 13: caldel = 152 eff = 0.99988
[10:49:28.067] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 14: caldel = 144 eff = 0.999976
[10:49:28.068] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 15: caldel = 162 eff = 0.999928
[10:49:28.071] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[10:49:28.086] INFO: enter test to run
[10:49:54.717] INFO: test: HighRate no parameter change
[10:49:54.717] INFO: running: highrate
[10:49:54.717] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[10:49:54.717] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[10:49:54.717] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[10:49:54.718] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: xpixelalive
[10:49:54.718] INFO: ----------------------------------------------------------------------
[10:49:54.718] INFO: PixTestHighRate::xPixelAlive() ntrig = 50, vcal = 200
[10:49:54.718] INFO: ----------------------------------------------------------------------
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: clk: 4
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: ctr: 4
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: sda: 19
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: tin: 9
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: level: 15
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: triggerdelay: 0
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: clk: 4
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: ctr: 4
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: sda: 19
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: tin: 9
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: level: 15
[10:49:54.719] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: triggerdelay: 20
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[10:49:54.729] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:49:55.335] INFO: Expecting 208000 events.
[10:50:07.044] INFO: 208000 events read in total (11182ms).
[10:50:07.047] INFO: Test took 12317ms.
[10:50:07.188] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:07.188] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 1272221
[10:50:07.188] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists highRate_C0 .. highRate_C15
[10:50:07.188] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:50:07.437] INFO: number of dead pixels (per ROC): 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
[10:50:07.437] INFO: number of red-efficiency pixels: 58 24 84 254 146 133 154 126 215 140 124 110 85 69 22 36
[10:50:07.437] INFO: number of X-ray hits detected: 60189 39238 63244 93485 105583 106001 108347 92165 90795 94301 92620 79410 82904 49879 21652 26013
[10:50:07.437] INFO: number of triggers sent (total per ROC): 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000
[10:50:07.437] INFO: number of Vcal hits detected: 207942 207975 207913 199906 207853 207863 207841 207874 207740 207857 207876 207641 207914 207930 207977 207963
[10:50:07.437] INFO: Vcal hit fiducial efficiency (%): 100.0 100.0 100.0 100.0 99.9 99.9 99.9 99.9 99.9 99.9 99.9 100.0 100.0 100.0 100.0 100.0
[10:50:07.437] INFO: Vcal hit overall efficiency (%): 100.0 100.0 100.0 96.1 99.9 99.9 99.9 99.9 99.9 99.9 99.9 99.8 100.0 100.0 100.0 100.0
[10:50:07.437] INFO: X-ray hit rate [MHz/cm2]: 17.6 11.5 18.5 27.4 30.9 31.1 31.8 27.0 26.6 27.6 27.1 23.3 24.3 14.6 6.3 7.6
[10:50:07.437] INFO: PixTestHighRate::doXPixelAlive() done
[10:50:07.485] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: clk: 4
[10:50:07.485] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: ctr: 4
[10:50:07.485] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: sda: 19
[10:50:07.485] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: tin: 9
[10:50:07.485] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: level: 15
[10:50:07.486] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: triggerdelay: 0
[10:50:07.486] INFO: PixTest:: pg_setup set to default.
[10:50:07.486] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[10:50:07.500] INFO: enter test to run
[10:50:26.901] INFO: test: HighRate no parameter change
[10:50:26.901] INFO: running: highrate
[10:50:26.901] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[10:50:26.901] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[10:50:26.901] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[10:50:26.902] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: xpixelalive
[10:50:26.902] INFO: ----------------------------------------------------------------------
[10:50:26.902] INFO: PixTestHighRate::xPixelAlive() ntrig = 50, vcal = 200
[10:50:26.902] INFO: ----------------------------------------------------------------------
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: clk: 4
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: ctr: 4
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: sda: 19
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: tin: 9
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: level: 15
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: triggerdelay: 0
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: clk: 4
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: ctr: 4
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: sda: 19
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: tin: 9
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: level: 15
[10:50:26.903] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: triggerdelay: 20
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[10:50:26.916] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:50:27.520] INFO: Expecting 208000 events.
[10:50:40.980] INFO: 208000 events read in total (12933ms).
[10:50:40.985] INFO: Test took 14069ms.
[10:50:41.273] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:41.273] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 2607171
[10:50:41.273] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists highRate_C0 .. highRate_C15
[10:50:41.273] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:50:41.570] INFO: number of dead pixels (per ROC): 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
[10:50:41.570] INFO: number of red-efficiency pixels: 159 93 312 492 541 496 515 404 537 452 340 362 271 193 66 76
[10:50:41.570] INFO: number of X-ray hits detected: 126699 83007 133477 197309 222052 222963 226216 194643 192438 198065 195547 166878 175560 104828 45785 55309
[10:50:41.570] INFO: number of triggers sent (total per ROC): 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000
[10:50:41.570] INFO: number of Vcal hits detected: 207834 207902 207650 199648 207396 207450 207433 207543 207160 207513 207641 207365 207718 207796 207933 207923
[10:50:41.570] INFO: Vcal hit fiducial efficiency (%): 99.9 100.0 99.8 99.8 99.7 99.8 99.8 99.8 99.6 99.8 99.8 99.8 99.9 99.9 100.0 100.0
[10:50:41.570] INFO: Vcal hit overall efficiency (%): 99.9 100.0 99.8 96.0 99.7 99.7 99.7 99.8 99.6 99.8 99.8 99.7 99.9 99.9 100.0 100.0
[10:50:41.570] INFO: X-ray hit rate [MHz/cm2]: 37.1 24.3 39.1 57.8 65.1 65.4 66.3 57.1 56.4 58.1 57.3 48.9 51.5 30.7 13.4 16.2
[10:50:41.570] INFO: PixTestHighRate::doXPixelAlive() done
[10:50:41.623] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: clk: 4
[10:50:41.623] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: ctr: 4
[10:50:41.623] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: sda: 19
[10:50:41.623] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: tin: 9
[10:50:41.623] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: level: 15
[10:50:41.623] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: triggerdelay: 0
[10:50:41.623] INFO: PixTest:: pg_setup set to default.
[10:50:41.623] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[10:50:41.639] INFO: enter test to run
[10:50:58.149] INFO: test: HighRate no parameter change
[10:50:58.149] INFO: running: highrate
[10:50:58.149] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[10:50:58.149] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[10:50:58.149] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[10:50:58.150] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: xpixelalive
[10:50:58.150] INFO: ----------------------------------------------------------------------
[10:50:58.150] INFO: PixTestHighRate::xPixelAlive() ntrig = 50, vcal = 200
[10:50:58.150] INFO: ----------------------------------------------------------------------
[10:50:58.150] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: clk: 4
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: ctr: 4
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: sda: 19
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: tin: 9
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: level: 15
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: triggerdelay: 0
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: clk: 4
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: ctr: 4
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: sda: 19
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: tin: 9
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: level: 15
[10:50:58.151] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: triggerdelay: 20
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[10:50:58.162] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[10:50:58.769] INFO: Expecting 208000 events.
[10:51:14.081] INFO: 208000 events read in total (14785ms).
[10:51:14.089] INFO: Test took 15927ms.
[10:51:14.525] INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:14.525] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 3930437
[10:51:14.525] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists highRate_C0 .. highRate_C15
[10:51:14.526] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[10:51:14.870] INFO: number of dead pixels (per ROC): 0 0 0 160 0 0 0 0 0 0 0 5 0 0 0 0
[10:51:14.870] INFO: number of red-efficiency pixels: 398 185 643 946 1236 1280 1208 951 1024 975 794 703 554 450 110 101
[10:51:14.870] INFO: number of X-ray hits detected: 192784 125858 202182 298468 338084 340409 343257 295832 292893 302219 295948 255965 266753 158518 70278 84594
[10:51:14.870] INFO: number of triggers sent (total per ROC): 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000
[10:51:14.870] INFO: number of Vcal hits detected: 207534 207802 207151 199082 206391 206313 206421 206766 206256 206823 207066 206928 207382 207476 207885 207898
[10:51:14.870] INFO: Vcal hit fiducial efficiency (%): 99.8 99.9 99.6 99.6 99.3 99.3 99.3 99.5 99.2 99.5 99.6 99.6 99.7 99.8 99.9 100.0
[10:51:14.870] INFO: Vcal hit overall efficiency (%): 99.8 99.9 99.6 95.7 99.2 99.2 99.2 99.4 99.2 99.4 99.6 99.5 99.7 99.7 99.9 100.0
[10:51:14.870] INFO: X-ray hit rate [MHz/cm2]: 56.5 36.9 59.3 87.5 99.1 99.8 100.6 86.7 85.8 88.6 86.7 75.0 78.2 46.5 20.6 24.8
[10:51:14.871] INFO: PixTestHighRate::doXPixelAlive() done
[10:51:14.918] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: clk: 4
[10:51:14.918] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: ctr: 4
[10:51:14.918] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: sda: 19
[10:51:14.918] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: tin: 9
[10:51:14.918] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: level: 15
[10:51:14.918] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: triggerdelay: 0
[10:51:14.918] INFO: PixTest:: pg_setup set to default.
[10:51:14.918] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[10:51:14.930] INFO: enter test to run
[10:51:18.420] INFO: test: exit no parameter change
[10:51:18.421] DEBUG: <pXar.cc/main:L340> Final Analog Current: 385.1mA
[10:51:18.422] DEBUG: <pXar.cc/main:L341> Final Digital Current: 466.3mA
[10:51:18.422] DEBUG: <pXar.cc/main:L342> Final Module Temperature: 18.3 C
[10:51:18.422] DEBUG: <PixMonitor.cc/dumpSummaries:L39> PixMonitor::dumpSummaries
[10:51:18.803] QUIET: Connection to board 33 closed.
[10:51:18.804] INFO: pXar: this is the end, my friend
[10:51:18.804] DEBUG: <PixSetup.cc/~PixSetup:L68> PixSetup free fPxarMemory