Test Date: 2016-10-26 10:29
Analysis date: 2016-12-29 12:58
Logfile
hrData_40.log
[11:30:24.746] INFO: *** Welcome to pxar ***
[11:30:24.746] INFO: *** Today: 2016/12/29
[11:30:24.769] INFO: *** Version: v1.9.0-825-g6bc29
[11:30:24.769] INFO: readRocDacs: /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//dacParameters35_C0.dat .. /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//dacParameters35_C15.dat
[11:30:24.794] INFO: readTbmDacs: /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//tbmParameters_C0a.dat .. /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//tbmParameters_C0b.dat
[11:30:24.794] INFO: readMaskFile: /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//defaultMaskFile.dat
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 0
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 1
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 2
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 3
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 4
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 5
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 6
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 7
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 8
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 9
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 10
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 11
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 12
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 13
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 14
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 15
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 16
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 17
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 18
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 19
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 20
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 21
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 22
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 23
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 24
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 25
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 26
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 27
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 28
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 29
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 30
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 31
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 32
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 33
[11:30:24.794] INFO: MASKED Roc 5 col/row: 18 34
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 35
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 36
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 37
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 38
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 39
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 40
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 41
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 42
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 43
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 44
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 45
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 46
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 47
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 48
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 49
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 50
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 51
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 52
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 53
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 54
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 55
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 56
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 57
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 58
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 59
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 60
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 61
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 62
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 63
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 64
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 65
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 66
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 67
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 68
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 69
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 70
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 71
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 72
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 73
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 74
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 75
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 76
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 77
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 78
[11:30:24.795] INFO: MASKED Roc 5 col/row: 18 79
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 0
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 1
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 2
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 3
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 4
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 5
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 6
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 7
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 8
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 9
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 10
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 11
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 12
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 13
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 14
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 15
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 16
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 17
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 18
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 19
[11:30:24.795] INFO: MASKED Roc 5 col/row: 19 20
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 21
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 22
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 23
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 24
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 25
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 26
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 27
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 28
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 29
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 30
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 31
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 32
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 33
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 34
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 35
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 36
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 37
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 38
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 39
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 40
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 41
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 42
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 43
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 44
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 45
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 46
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 47
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 48
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 49
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 50
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 51
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 52
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 53
[11:30:24.796] INFO: MASKED Roc 5 col/row: 19 54
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 55
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 56
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 57
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 58
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 59
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 60
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 61
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 62
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 63
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 64
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 65
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 66
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 67
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 68
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 69
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 70
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 71
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 72
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 73
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 74
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 75
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 76
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 77
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 78
[11:30:24.797] INFO: MASKED Roc 5 col/row: 19 79
[11:30:24.797] INFO: readTrimFile: /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//trimParameters35_C0.dat .. /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//trimParameters35_C15.dat
[11:30:24.837] INFO: masking Roc 5 col/row: 18 0
[11:30:24.837] INFO: masking Roc 5 col/row: 18 1
[11:30:24.837] INFO: masking Roc 5 col/row: 18 2
[11:30:24.837] INFO: masking Roc 5 col/row: 18 3
[11:30:24.837] INFO: masking Roc 5 col/row: 18 4
[11:30:24.837] INFO: masking Roc 5 col/row: 18 5
[11:30:24.837] INFO: masking Roc 5 col/row: 18 6
[11:30:24.837] INFO: masking Roc 5 col/row: 18 7
[11:30:24.837] INFO: masking Roc 5 col/row: 18 8
[11:30:24.837] INFO: masking Roc 5 col/row: 18 9
[11:30:24.837] INFO: masking Roc 5 col/row: 18 10
[11:30:24.837] INFO: masking Roc 5 col/row: 18 11
[11:30:24.837] INFO: masking Roc 5 col/row: 18 12
[11:30:24.837] INFO: masking Roc 5 col/row: 18 13
[11:30:24.837] INFO: masking Roc 5 col/row: 18 14
[11:30:24.837] INFO: masking Roc 5 col/row: 18 15
[11:30:24.837] INFO: masking Roc 5 col/row: 18 16
[11:30:24.837] INFO: masking Roc 5 col/row: 18 17
[11:30:24.837] INFO: masking Roc 5 col/row: 18 18
[11:30:24.837] INFO: masking Roc 5 col/row: 18 19
[11:30:24.837] INFO: masking Roc 5 col/row: 18 20
[11:30:24.837] INFO: masking Roc 5 col/row: 18 21
[11:30:24.837] INFO: masking Roc 5 col/row: 18 22
[11:30:24.837] INFO: masking Roc 5 col/row: 18 23
[11:30:24.837] INFO: masking Roc 5 col/row: 18 24
[11:30:24.837] INFO: masking Roc 5 col/row: 18 25
[11:30:24.837] INFO: masking Roc 5 col/row: 18 26
[11:30:24.837] INFO: masking Roc 5 col/row: 18 27
[11:30:24.837] INFO: masking Roc 5 col/row: 18 28
[11:30:24.837] INFO: masking Roc 5 col/row: 18 29
[11:30:24.837] INFO: masking Roc 5 col/row: 18 30
[11:30:24.837] INFO: masking Roc 5 col/row: 18 31
[11:30:24.837] INFO: masking Roc 5 col/row: 18 32
[11:30:24.837] INFO: masking Roc 5 col/row: 18 33
[11:30:24.837] INFO: masking Roc 5 col/row: 18 34
[11:30:24.837] INFO: masking Roc 5 col/row: 18 35
[11:30:24.837] INFO: masking Roc 5 col/row: 18 36
[11:30:24.837] INFO: masking Roc 5 col/row: 18 37
[11:30:24.837] INFO: masking Roc 5 col/row: 18 38
[11:30:24.837] INFO: masking Roc 5 col/row: 18 39
[11:30:24.837] INFO: masking Roc 5 col/row: 18 40
[11:30:24.837] INFO: masking Roc 5 col/row: 18 41
[11:30:24.837] INFO: masking Roc 5 col/row: 18 42
[11:30:24.837] INFO: masking Roc 5 col/row: 18 43
[11:30:24.837] INFO: masking Roc 5 col/row: 18 44
[11:30:24.837] INFO: masking Roc 5 col/row: 18 45
[11:30:24.837] INFO: masking Roc 5 col/row: 18 46
[11:30:24.837] INFO: masking Roc 5 col/row: 18 47
[11:30:24.837] INFO: masking Roc 5 col/row: 18 48
[11:30:24.837] INFO: masking Roc 5 col/row: 18 49
[11:30:24.837] INFO: masking Roc 5 col/row: 18 50
[11:30:24.837] INFO: masking Roc 5 col/row: 18 51
[11:30:24.837] INFO: masking Roc 5 col/row: 18 52
[11:30:24.837] INFO: masking Roc 5 col/row: 18 53
[11:30:24.837] INFO: masking Roc 5 col/row: 18 54
[11:30:24.837] INFO: masking Roc 5 col/row: 18 55
[11:30:24.837] INFO: masking Roc 5 col/row: 18 56
[11:30:24.837] INFO: masking Roc 5 col/row: 18 57
[11:30:24.837] INFO: masking Roc 5 col/row: 18 58
[11:30:24.837] INFO: masking Roc 5 col/row: 18 59
[11:30:24.837] INFO: masking Roc 5 col/row: 18 60
[11:30:24.837] INFO: masking Roc 5 col/row: 18 61
[11:30:24.837] INFO: masking Roc 5 col/row: 18 62
[11:30:24.837] INFO: masking Roc 5 col/row: 18 63
[11:30:24.838] INFO: masking Roc 5 col/row: 18 64
[11:30:24.838] INFO: masking Roc 5 col/row: 18 65
[11:30:24.838] INFO: masking Roc 5 col/row: 18 66
[11:30:24.838] INFO: masking Roc 5 col/row: 18 67
[11:30:24.838] INFO: masking Roc 5 col/row: 18 68
[11:30:24.838] INFO: masking Roc 5 col/row: 18 69
[11:30:24.838] INFO: masking Roc 5 col/row: 18 70
[11:30:24.838] INFO: masking Roc 5 col/row: 18 71
[11:30:24.838] INFO: masking Roc 5 col/row: 18 72
[11:30:24.838] INFO: masking Roc 5 col/row: 18 73
[11:30:24.838] INFO: masking Roc 5 col/row: 18 74
[11:30:24.838] INFO: masking Roc 5 col/row: 18 75
[11:30:24.838] INFO: masking Roc 5 col/row: 18 76
[11:30:24.838] INFO: masking Roc 5 col/row: 18 77
[11:30:24.838] INFO: masking Roc 5 col/row: 18 78
[11:30:24.838] INFO: masking Roc 5 col/row: 18 79
[11:30:24.838] INFO: masking Roc 5 col/row: 19 0
[11:30:24.838] INFO: masking Roc 5 col/row: 19 1
[11:30:24.838] INFO: masking Roc 5 col/row: 19 2
[11:30:24.838] INFO: masking Roc 5 col/row: 19 3
[11:30:24.838] INFO: masking Roc 5 col/row: 19 4
[11:30:24.838] INFO: masking Roc 5 col/row: 19 5
[11:30:24.838] INFO: masking Roc 5 col/row: 19 6
[11:30:24.838] INFO: masking Roc 5 col/row: 19 7
[11:30:24.838] INFO: masking Roc 5 col/row: 19 8
[11:30:24.838] INFO: masking Roc 5 col/row: 19 9
[11:30:24.838] INFO: masking Roc 5 col/row: 19 10
[11:30:24.838] INFO: masking Roc 5 col/row: 19 11
[11:30:24.838] INFO: masking Roc 5 col/row: 19 12
[11:30:24.838] INFO: masking Roc 5 col/row: 19 13
[11:30:24.838] INFO: masking Roc 5 col/row: 19 14
[11:30:24.838] INFO: masking Roc 5 col/row: 19 15
[11:30:24.838] INFO: masking Roc 5 col/row: 19 16
[11:30:24.838] INFO: masking Roc 5 col/row: 19 17
[11:30:24.838] INFO: masking Roc 5 col/row: 19 18
[11:30:24.838] INFO: masking Roc 5 col/row: 19 19
[11:30:24.838] INFO: masking Roc 5 col/row: 19 20
[11:30:24.838] INFO: masking Roc 5 col/row: 19 21
[11:30:24.838] INFO: masking Roc 5 col/row: 19 22
[11:30:24.838] INFO: masking Roc 5 col/row: 19 23
[11:30:24.838] INFO: masking Roc 5 col/row: 19 24
[11:30:24.838] INFO: masking Roc 5 col/row: 19 25
[11:30:24.838] INFO: masking Roc 5 col/row: 19 26
[11:30:24.838] INFO: masking Roc 5 col/row: 19 27
[11:30:24.838] INFO: masking Roc 5 col/row: 19 28
[11:30:24.838] INFO: masking Roc 5 col/row: 19 29
[11:30:24.838] INFO: masking Roc 5 col/row: 19 30
[11:30:24.838] INFO: masking Roc 5 col/row: 19 31
[11:30:24.838] INFO: masking Roc 5 col/row: 19 32
[11:30:24.838] INFO: masking Roc 5 col/row: 19 33
[11:30:24.838] INFO: masking Roc 5 col/row: 19 34
[11:30:24.838] INFO: masking Roc 5 col/row: 19 35
[11:30:24.838] INFO: masking Roc 5 col/row: 19 36
[11:30:24.838] INFO: masking Roc 5 col/row: 19 37
[11:30:24.838] INFO: masking Roc 5 col/row: 19 38
[11:30:24.838] INFO: masking Roc 5 col/row: 19 39
[11:30:24.838] INFO: masking Roc 5 col/row: 19 40
[11:30:24.838] INFO: masking Roc 5 col/row: 19 41
[11:30:24.838] INFO: masking Roc 5 col/row: 19 42
[11:30:24.838] INFO: masking Roc 5 col/row: 19 43
[11:30:24.838] INFO: masking Roc 5 col/row: 19 44
[11:30:24.838] INFO: masking Roc 5 col/row: 19 45
[11:30:24.838] INFO: masking Roc 5 col/row: 19 46
[11:30:24.838] INFO: masking Roc 5 col/row: 19 47
[11:30:24.838] INFO: masking Roc 5 col/row: 19 48
[11:30:24.838] INFO: masking Roc 5 col/row: 19 49
[11:30:24.838] INFO: masking Roc 5 col/row: 19 50
[11:30:24.838] INFO: masking Roc 5 col/row: 19 51
[11:30:24.838] INFO: masking Roc 5 col/row: 19 52
[11:30:24.838] INFO: masking Roc 5 col/row: 19 53
[11:30:24.838] INFO: masking Roc 5 col/row: 19 54
[11:30:24.838] INFO: masking Roc 5 col/row: 19 55
[11:30:24.838] INFO: masking Roc 5 col/row: 19 56
[11:30:24.838] INFO: masking Roc 5 col/row: 19 57
[11:30:24.838] INFO: masking Roc 5 col/row: 19 58
[11:30:24.838] INFO: masking Roc 5 col/row: 19 59
[11:30:24.838] INFO: masking Roc 5 col/row: 19 60
[11:30:24.838] INFO: masking Roc 5 col/row: 19 61
[11:30:24.838] INFO: masking Roc 5 col/row: 19 62
[11:30:24.838] INFO: masking Roc 5 col/row: 19 63
[11:30:24.838] INFO: masking Roc 5 col/row: 19 64
[11:30:24.838] INFO: masking Roc 5 col/row: 19 65
[11:30:24.838] INFO: masking Roc 5 col/row: 19 66
[11:30:24.838] INFO: masking Roc 5 col/row: 19 67
[11:30:24.838] INFO: masking Roc 5 col/row: 19 68
[11:30:24.838] INFO: masking Roc 5 col/row: 19 69
[11:30:24.838] INFO: masking Roc 5 col/row: 19 70
[11:30:24.838] INFO: masking Roc 5 col/row: 19 71
[11:30:24.839] INFO: masking Roc 5 col/row: 19 72
[11:30:24.839] INFO: masking Roc 5 col/row: 19 73
[11:30:24.839] INFO: masking Roc 5 col/row: 19 74
[11:30:24.839] INFO: masking Roc 5 col/row: 19 75
[11:30:24.839] INFO: masking Roc 5 col/row: 19 76
[11:30:24.839] INFO: masking Roc 5 col/row: 19 77
[11:30:24.839] INFO: masking Roc 5 col/row: 19 78
[11:30:24.839] INFO: masking Roc 5 col/row: 19 79
[11:30:24.928] INFO: clk: 4
[11:30:24.928] INFO: ctr: 4
[11:30:24.928] INFO: sda: 19
[11:30:24.928] INFO: tin: 9
[11:30:24.928] INFO: level: 15
[11:30:24.928] INFO: triggerdelay: 0
[11:30:24.928] QUIET: Instanciating API for pxar v1.9.0+825~g6bc290c
[11:30:24.928] INFO: Log level: DEBUG
[11:30:24.946] QUIET: Connection to board DTB_WREKRL opened.
[11:30:24.949] INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 33
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WREKRL
MAC address: 40D855118021
Hostname: pixelDTB033
Comment:
------------------------------------------------------
[11:30:24.952] INFO: RPC call hashes of host and DTB match: 398089610
[11:30:26.482] INFO: DUT info:
[11:30:26.482] INFO: The DUT currently contains the following objects:
[11:30:26.482] INFO: 2 TBM Cores tbm08c (2 ON)
[11:30:26.482] INFO: TBM Core alpha (0): 7 registers set
[11:30:26.482] INFO: TBM Core beta (1): 7 registers set
[11:30:26.482] INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:30:26.482] INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 5: 19 DACs set, Pixels: 160 masked, 0 active.
[11:30:26.482] INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.482] INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB<-
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> dumpall: checkbox(0)
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> dumpproblematic: checkbox(0)
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 5
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vcals: 250
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB2<-
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vcals: 222
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> plwidth: 35
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> targetia: 24
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB3<-
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> dumpall: checkbox(0)
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> dumpproblematic: checkbox(0)
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 5
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vcals: 250
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->BB4<-
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> savecaldelscan: checkbox(0)
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 100
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> cals: 1
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> caldello: 80
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> caldelhi: 200
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> caldelstep: 10
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vthrcomplo: 70
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vthrcomphi: 130
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vthrcompstep: 5
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> noisypixels: 10
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 255
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L107> cut: 0.5
[11:30:26.491] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Cmd<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->DacDacScan<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> phmap: checkbox
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac1: caldel
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac1lo: 0
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac1hi: 255
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac2: vthrcomp
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac2lo: 0
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac2hi: 255
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->DacScan<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> phmap: checkbox(1)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> allpixels: checkbox(0)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> unmasked: checkbox(0)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dac: vcal
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> daclo: 0
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dachi: 255
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->GainPedestal<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> showfits: checkbox(0)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> extended: checkbox(0)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dumphists: checkbox(0)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> vcalstep: 10
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> measure: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> fit: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> save: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->HighRate<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> trimhotpixels: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> trimhotpixelthr: 200
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> runsecondshotpixels: 10
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> savetrimbits: checkbox(1)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> maskuntrimmable: checkbox(1)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> maskhotpixels: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> savemaskfile: checkbox(0)
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> maskfilename: default
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> caldelscan: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> xpixelalive: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 50
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 200
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> xnoisemaps: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> daclo: 0
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dachi: 100
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> dacs/step: 20
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> rundaq: button
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> trgfrequency(khz): 20
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> runseconds: 2
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> triggerdelay: 20
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> delaytbm: checkbox
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> filltree: checkbox
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->IV<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> port: /dev/FIXME
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> voltagestart: 0
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> voltagestop: 600
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> voltagestep: 5
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> delay: 1
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> compliance(ua): 100
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->PhOptimization<-
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[11:30:26.492] DEBUG: <PixTestParameters.cc/dump:L107> safetymarginlow: 20
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> saturationvcal: 100
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> quantilesaturation: 0.98
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->PixelAlive<-
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> phmap: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 200
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> alivetest: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> masktest: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> addressdecodingtest: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Pretest<-
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> programroc: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> checkidig: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> targetia: 24
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> setvana: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> iterations: 100
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> settimings: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> findtiming: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> findworkingpixel: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> setvthrcompcaldel: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> pix: 11,20
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 250
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> deltavthrcomp: 50
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> fraccaldel: 0.5
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 5
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> savedacs: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Readback<-
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> calibratevd: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> calibrateva: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> calibrateia: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> readbackvbg: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> getcalibratedvbg: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> usecalvd: checkbox(1)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> usecalva: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> setvana: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Scurves<-
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> adjustvcal: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> dumpall: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> dumpproblematic: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> dumpoutputfile: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 50
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> dac: Vcal
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> daclo: 0
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> dachi: 200
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> dacs/step: -1
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> ntrig/step: -1
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> scurves: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Timing<-
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> targetclk: 4
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 10000
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> clocksdascan: button
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> notokenpass: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> ignorereadback: checkbox(0)
[11:30:26.493] DEBUG: <PixTestParameters.cc/dump:L107> phasescan: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> levelscan: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> tbmphasescan: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> rocdelayscan: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> timingtest: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> saveparameters: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Trim<-
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> trim: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> ntrig: 8
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> vcal: 35
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> trimbits: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L104> PixTestParameters: ->Xray<-
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> maskhotpixels: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> savemaskfile: checkbox(0)
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> maskfilename: default
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> source: Ag
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> phrun: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> runseconds: 100
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> trgfrequency(khz): 100
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> ratescan: button
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> vthrcompmin: 10
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> vthrcompmax: 80
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> stepseconds: 5
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> delaytbm: checkbox
[11:30:26.494] DEBUG: <PixTestParameters.cc/dump:L107> filltree: checkbox
[11:30:26.496] DEBUG: <PixSetup.cc/init:L81> PixSetup init start; getCurrentRSS() = 29061120
[11:30:26.496] DEBUG: <PixSetup.cc/init:L87> fPixTestParameters = 0xba2730
[11:30:26.496] DEBUG: <PixSetup.cc/init:L88> fConfigParameters = 0xac8310
[11:30:26.496] DEBUG: <PixSetup.cc/init:L89> fPxarMemory = 0x7f3bcdd94010
[11:30:26.496] DEBUG: <PixSetup.cc/init:L90> fPxarMemHi = 0x7f3bd3fff510
[11:30:26.496] DEBUG: <PixSetup.cc/init:L106> PixSetup init done; getCurrentRSS() = 29126656 fPxarMemory = 0x7f3bcdd94010
[11:30:26.498] DEBUG: <pXar.cc/main:L223> Initial Analog Current: 389.9mA
[11:30:26.499] DEBUG: <pXar.cc/main:L224> Initial Digital Current: 469.5mA
[11:30:26.499] DEBUG: <pXar.cc/main:L225> Initial Module Temperature: 2.8 C
[11:30:26.499] DEBUG: <PixTestFactory.cc/PixTestFactory:L53> PixTestFactory::PixTestFactory()
[11:30:26.900] INFO: enter 'restricted' command line mode
[11:30:26.900] INFO: enter test to run
[11:30:42.965] INFO: test: PixelAlive no parameter change
[11:30:42.965] INFO: running: pixelalive
[11:30:42.965] DEBUG: <PixTestAlive.cc/init:L83> PixTestAlive::init()
[11:30:42.969] DEBUG: <PixTestAlive.cc/PixTestAlive:L21> PixTestAlive ctor(PixSetup &a, string, TGTab *)
[11:30:42.969] DEBUG: <PixTestAlive.cc/runCommand:L62> running command: alivetest
[11:30:42.973] INFO: ----------------------------------------------------------------------
[11:30:42.973] INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:30:42.973] INFO: ----------------------------------------------------------------------
[11:30:42.977] INFO: ROC 5 masking pixel 18/0
[11:30:42.977] INFO: ROC 5 masking pixel 18/1
[11:30:42.978] INFO: ROC 5 masking pixel 18/2
[11:30:42.978] INFO: ROC 5 masking pixel 18/3
[11:30:42.978] INFO: ROC 5 masking pixel 18/4
[11:30:42.978] INFO: ROC 5 masking pixel 18/5
[11:30:42.978] INFO: ROC 5 masking pixel 18/6
[11:30:42.978] INFO: ROC 5 masking pixel 18/7
[11:30:42.978] INFO: ROC 5 masking pixel 18/8
[11:30:42.978] INFO: ROC 5 masking pixel 18/9
[11:30:42.978] INFO: ROC 5 masking pixel 18/10
[11:30:42.978] INFO: ROC 5 masking pixel 18/11
[11:30:42.978] INFO: ROC 5 masking pixel 18/12
[11:30:42.978] INFO: ROC 5 masking pixel 18/13
[11:30:42.978] INFO: ROC 5 masking pixel 18/14
[11:30:42.978] INFO: ROC 5 masking pixel 18/15
[11:30:42.978] INFO: ROC 5 masking pixel 18/16
[11:30:42.978] INFO: ROC 5 masking pixel 18/17
[11:30:42.978] INFO: ROC 5 masking pixel 18/18
[11:30:42.978] INFO: ROC 5 masking pixel 18/19
[11:30:42.978] INFO: ROC 5 masking pixel 18/20
[11:30:42.979] INFO: ROC 5 masking pixel 18/21
[11:30:42.979] INFO: ROC 5 masking pixel 18/22
[11:30:42.979] INFO: ROC 5 masking pixel 18/23
[11:30:42.979] INFO: ROC 5 masking pixel 18/24
[11:30:42.979] INFO: ROC 5 masking pixel 18/25
[11:30:42.979] INFO: ROC 5 masking pixel 18/26
[11:30:42.979] INFO: ROC 5 masking pixel 18/27
[11:30:42.979] INFO: ROC 5 masking pixel 18/28
[11:30:42.979] INFO: ROC 5 masking pixel 18/29
[11:30:42.979] INFO: ROC 5 masking pixel 18/30
[11:30:42.979] INFO: ROC 5 masking pixel 18/31
[11:30:42.979] INFO: ROC 5 masking pixel 18/32
[11:30:42.979] INFO: ROC 5 masking pixel 18/33
[11:30:42.979] INFO: ROC 5 masking pixel 18/34
[11:30:42.979] INFO: ROC 5 masking pixel 18/35
[11:30:42.979] INFO: ROC 5 masking pixel 18/36
[11:30:42.979] INFO: ROC 5 masking pixel 18/37
[11:30:42.979] INFO: ROC 5 masking pixel 18/38
[11:30:42.979] INFO: ROC 5 masking pixel 18/39
[11:30:42.979] INFO: ROC 5 masking pixel 18/40
[11:30:42.980] INFO: ROC 5 masking pixel 18/41
[11:30:42.980] INFO: ROC 5 masking pixel 18/42
[11:30:42.980] INFO: ROC 5 masking pixel 18/43
[11:30:42.980] INFO: ROC 5 masking pixel 18/44
[11:30:42.980] INFO: ROC 5 masking pixel 18/45
[11:30:42.980] INFO: ROC 5 masking pixel 18/46
[11:30:42.980] INFO: ROC 5 masking pixel 18/47
[11:30:42.980] INFO: ROC 5 masking pixel 18/48
[11:30:42.980] INFO: ROC 5 masking pixel 18/49
[11:30:42.980] INFO: ROC 5 masking pixel 18/50
[11:30:42.980] INFO: ROC 5 masking pixel 18/51
[11:30:42.980] INFO: ROC 5 masking pixel 18/52
[11:30:42.980] INFO: ROC 5 masking pixel 18/53
[11:30:42.980] INFO: ROC 5 masking pixel 18/54
[11:30:42.980] INFO: ROC 5 masking pixel 18/55
[11:30:42.980] INFO: ROC 5 masking pixel 18/56
[11:30:42.980] INFO: ROC 5 masking pixel 18/57
[11:30:42.980] INFO: ROC 5 masking pixel 18/58
[11:30:42.980] INFO: ROC 5 masking pixel 18/59
[11:30:42.980] INFO: ROC 5 masking pixel 18/60
[11:30:42.980] INFO: ROC 5 masking pixel 18/61
[11:30:42.981] INFO: ROC 5 masking pixel 18/62
[11:30:42.981] INFO: ROC 5 masking pixel 18/63
[11:30:42.981] INFO: ROC 5 masking pixel 18/64
[11:30:42.981] INFO: ROC 5 masking pixel 18/65
[11:30:42.981] INFO: ROC 5 masking pixel 18/66
[11:30:42.981] INFO: ROC 5 masking pixel 18/67
[11:30:42.981] INFO: ROC 5 masking pixel 18/68
[11:30:42.981] INFO: ROC 5 masking pixel 18/69
[11:30:42.981] INFO: ROC 5 masking pixel 18/70
[11:30:42.981] INFO: ROC 5 masking pixel 18/71
[11:30:42.981] INFO: ROC 5 masking pixel 18/72
[11:30:42.981] INFO: ROC 5 masking pixel 18/73
[11:30:42.981] INFO: ROC 5 masking pixel 18/74
[11:30:42.981] INFO: ROC 5 masking pixel 18/75
[11:30:42.981] INFO: ROC 5 masking pixel 18/76
[11:30:42.981] INFO: ROC 5 masking pixel 18/77
[11:30:42.981] INFO: ROC 5 masking pixel 18/78
[11:30:42.981] INFO: ROC 5 masking pixel 18/79
[11:30:42.981] INFO: ROC 5 masking pixel 19/0
[11:30:42.981] INFO: ROC 5 masking pixel 19/1
[11:30:42.981] INFO: ROC 5 masking pixel 19/2
[11:30:42.981] INFO: ROC 5 masking pixel 19/3
[11:30:42.981] INFO: ROC 5 masking pixel 19/4
[11:30:42.981] INFO: ROC 5 masking pixel 19/5
[11:30:42.982] INFO: ROC 5 masking pixel 19/6
[11:30:42.982] INFO: ROC 5 masking pixel 19/7
[11:30:42.982] INFO: ROC 5 masking pixel 19/8
[11:30:42.982] INFO: ROC 5 masking pixel 19/9
[11:30:42.982] INFO: ROC 5 masking pixel 19/10
[11:30:42.982] INFO: ROC 5 masking pixel 19/11
[11:30:42.982] INFO: ROC 5 masking pixel 19/12
[11:30:42.982] INFO: ROC 5 masking pixel 19/13
[11:30:42.982] INFO: ROC 5 masking pixel 19/14
[11:30:42.982] INFO: ROC 5 masking pixel 19/15
[11:30:42.982] INFO: ROC 5 masking pixel 19/16
[11:30:42.982] INFO: ROC 5 masking pixel 19/17
[11:30:42.982] INFO: ROC 5 masking pixel 19/18
[11:30:42.982] INFO: ROC 5 masking pixel 19/19
[11:30:42.982] INFO: ROC 5 masking pixel 19/20
[11:30:42.982] INFO: ROC 5 masking pixel 19/21
[11:30:42.982] INFO: ROC 5 masking pixel 19/22
[11:30:42.982] INFO: ROC 5 masking pixel 19/23
[11:30:42.982] INFO: ROC 5 masking pixel 19/24
[11:30:42.982] INFO: ROC 5 masking pixel 19/25
[11:30:42.982] INFO: ROC 5 masking pixel 19/26
[11:30:42.982] INFO: ROC 5 masking pixel 19/27
[11:30:42.982] INFO: ROC 5 masking pixel 19/28
[11:30:42.982] INFO: ROC 5 masking pixel 19/29
[11:30:42.982] INFO: ROC 5 masking pixel 19/30
[11:30:42.982] INFO: ROC 5 masking pixel 19/31
[11:30:42.982] INFO: ROC 5 masking pixel 19/32
[11:30:42.982] INFO: ROC 5 masking pixel 19/33
[11:30:42.982] INFO: ROC 5 masking pixel 19/34
[11:30:42.982] INFO: ROC 5 masking pixel 19/35
[11:30:42.982] INFO: ROC 5 masking pixel 19/36
[11:30:42.982] INFO: ROC 5 masking pixel 19/37
[11:30:42.982] INFO: ROC 5 masking pixel 19/38
[11:30:42.982] INFO: ROC 5 masking pixel 19/39
[11:30:42.982] INFO: ROC 5 masking pixel 19/40
[11:30:42.982] INFO: ROC 5 masking pixel 19/41
[11:30:42.982] INFO: ROC 5 masking pixel 19/42
[11:30:42.982] INFO: ROC 5 masking pixel 19/43
[11:30:42.982] INFO: ROC 5 masking pixel 19/44
[11:30:42.982] INFO: ROC 5 masking pixel 19/45
[11:30:42.982] INFO: ROC 5 masking pixel 19/46
[11:30:42.982] INFO: ROC 5 masking pixel 19/47
[11:30:42.982] INFO: ROC 5 masking pixel 19/48
[11:30:42.982] INFO: ROC 5 masking pixel 19/49
[11:30:42.982] INFO: ROC 5 masking pixel 19/50
[11:30:42.982] INFO: ROC 5 masking pixel 19/51
[11:30:42.982] INFO: ROC 5 masking pixel 19/52
[11:30:42.982] INFO: ROC 5 masking pixel 19/53
[11:30:42.982] INFO: ROC 5 masking pixel 19/54
[11:30:42.982] INFO: ROC 5 masking pixel 19/55
[11:30:42.982] INFO: ROC 5 masking pixel 19/56
[11:30:42.982] INFO: ROC 5 masking pixel 19/57
[11:30:42.982] INFO: ROC 5 masking pixel 19/58
[11:30:42.982] INFO: ROC 5 masking pixel 19/59
[11:30:42.982] INFO: ROC 5 masking pixel 19/60
[11:30:42.982] INFO: ROC 5 masking pixel 19/61
[11:30:42.982] INFO: ROC 5 masking pixel 19/62
[11:30:42.982] INFO: ROC 5 masking pixel 19/63
[11:30:42.982] INFO: ROC 5 masking pixel 19/64
[11:30:42.982] INFO: ROC 5 masking pixel 19/65
[11:30:42.982] INFO: ROC 5 masking pixel 19/66
[11:30:42.982] INFO: ROC 5 masking pixel 19/67
[11:30:42.982] INFO: ROC 5 masking pixel 19/68
[11:30:42.982] INFO: ROC 5 masking pixel 19/69
[11:30:42.982] INFO: ROC 5 masking pixel 19/70
[11:30:42.982] INFO: ROC 5 masking pixel 19/71
[11:30:42.982] INFO: ROC 5 masking pixel 19/72
[11:30:42.982] INFO: ROC 5 masking pixel 19/73
[11:30:42.982] INFO: ROC 5 masking pixel 19/74
[11:30:42.982] INFO: ROC 5 masking pixel 19/75
[11:30:42.982] INFO: ROC 5 masking pixel 19/76
[11:30:42.982] INFO: ROC 5 masking pixel 19/77
[11:30:42.982] INFO: ROC 5 masking pixel 19/78
[11:30:42.983] INFO: ROC 5 masking pixel 19/79
[11:30:42.983] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:30:43.295] INFO: Expecting 41600 events.
[11:30:47.612] INFO: 41600 events read in total (3599ms).
[11:30:47.777] INFO: Test took 4794ms.
[11:30:47.786] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:47.786] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 66399
[11:30:47.786] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists PixelAlive_C0 .. PixelAlive_C15
[11:30:48.049] INFO: PixTestAlive::aliveTest() done
[11:30:48.049] INFO: number of dead pixels (per ROC): 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 1
[11:30:48.049] DEBUG: <PixTestAlive.cc/aliveTest:L199> number of red-efficiency pixels: 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 1
[11:30:48.049] INFO: ROC 5 masking pixel 18/0
[11:30:48.049] INFO: ROC 5 masking pixel 18/1
[11:30:48.049] INFO: ROC 5 masking pixel 18/2
[11:30:48.049] INFO: ROC 5 masking pixel 18/3
[11:30:48.049] INFO: ROC 5 masking pixel 18/4
[11:30:48.049] INFO: ROC 5 masking pixel 18/5
[11:30:48.049] INFO: ROC 5 masking pixel 18/6
[11:30:48.049] INFO: ROC 5 masking pixel 18/7
[11:30:48.049] INFO: ROC 5 masking pixel 18/8
[11:30:48.049] INFO: ROC 5 masking pixel 18/9
[11:30:48.049] INFO: ROC 5 masking pixel 18/10
[11:30:48.049] INFO: ROC 5 masking pixel 18/11
[11:30:48.049] INFO: ROC 5 masking pixel 18/12
[11:30:48.049] INFO: ROC 5 masking pixel 18/13
[11:30:48.049] INFO: ROC 5 masking pixel 18/14
[11:30:48.049] INFO: ROC 5 masking pixel 18/15
[11:30:48.049] INFO: ROC 5 masking pixel 18/16
[11:30:48.049] INFO: ROC 5 masking pixel 18/17
[11:30:48.049] INFO: ROC 5 masking pixel 18/18
[11:30:48.049] INFO: ROC 5 masking pixel 18/19
[11:30:48.049] INFO: ROC 5 masking pixel 18/20
[11:30:48.049] INFO: ROC 5 masking pixel 18/21
[11:30:48.049] INFO: ROC 5 masking pixel 18/22
[11:30:48.049] INFO: ROC 5 masking pixel 18/23
[11:30:48.049] INFO: ROC 5 masking pixel 18/24
[11:30:48.049] INFO: ROC 5 masking pixel 18/25
[11:30:48.049] INFO: ROC 5 masking pixel 18/26
[11:30:48.049] INFO: ROC 5 masking pixel 18/27
[11:30:48.049] INFO: ROC 5 masking pixel 18/28
[11:30:48.049] INFO: ROC 5 masking pixel 18/29
[11:30:48.049] INFO: ROC 5 masking pixel 18/30
[11:30:48.049] INFO: ROC 5 masking pixel 18/31
[11:30:48.049] INFO: ROC 5 masking pixel 18/32
[11:30:48.049] INFO: ROC 5 masking pixel 18/33
[11:30:48.049] INFO: ROC 5 masking pixel 18/34
[11:30:48.049] INFO: ROC 5 masking pixel 18/35
[11:30:48.049] INFO: ROC 5 masking pixel 18/36
[11:30:48.049] INFO: ROC 5 masking pixel 18/37
[11:30:48.049] INFO: ROC 5 masking pixel 18/38
[11:30:48.050] INFO: ROC 5 masking pixel 18/39
[11:30:48.050] INFO: ROC 5 masking pixel 18/40
[11:30:48.050] INFO: ROC 5 masking pixel 18/41
[11:30:48.050] INFO: ROC 5 masking pixel 18/42
[11:30:48.050] INFO: ROC 5 masking pixel 18/43
[11:30:48.050] INFO: ROC 5 masking pixel 18/44
[11:30:48.050] INFO: ROC 5 masking pixel 18/45
[11:30:48.050] INFO: ROC 5 masking pixel 18/46
[11:30:48.050] INFO: ROC 5 masking pixel 18/47
[11:30:48.050] INFO: ROC 5 masking pixel 18/48
[11:30:48.050] INFO: ROC 5 masking pixel 18/49
[11:30:48.050] INFO: ROC 5 masking pixel 18/50
[11:30:48.050] INFO: ROC 5 masking pixel 18/51
[11:30:48.050] INFO: ROC 5 masking pixel 18/52
[11:30:48.050] INFO: ROC 5 masking pixel 18/53
[11:30:48.050] INFO: ROC 5 masking pixel 18/54
[11:30:48.050] INFO: ROC 5 masking pixel 18/55
[11:30:48.050] INFO: ROC 5 masking pixel 18/56
[11:30:48.050] INFO: ROC 5 masking pixel 18/57
[11:30:48.050] INFO: ROC 5 masking pixel 18/58
[11:30:48.050] INFO: ROC 5 masking pixel 18/59
[11:30:48.050] INFO: ROC 5 masking pixel 18/60
[11:30:48.050] INFO: ROC 5 masking pixel 18/61
[11:30:48.050] INFO: ROC 5 masking pixel 18/62
[11:30:48.050] INFO: ROC 5 masking pixel 18/63
[11:30:48.050] INFO: ROC 5 masking pixel 18/64
[11:30:48.050] INFO: ROC 5 masking pixel 18/65
[11:30:48.050] INFO: ROC 5 masking pixel 18/66
[11:30:48.050] INFO: ROC 5 masking pixel 18/67
[11:30:48.050] INFO: ROC 5 masking pixel 18/68
[11:30:48.050] INFO: ROC 5 masking pixel 18/69
[11:30:48.050] INFO: ROC 5 masking pixel 18/70
[11:30:48.050] INFO: ROC 5 masking pixel 18/71
[11:30:48.050] INFO: ROC 5 masking pixel 18/72
[11:30:48.050] INFO: ROC 5 masking pixel 18/73
[11:30:48.050] INFO: ROC 5 masking pixel 18/74
[11:30:48.050] INFO: ROC 5 masking pixel 18/75
[11:30:48.050] INFO: ROC 5 masking pixel 18/76
[11:30:48.050] INFO: ROC 5 masking pixel 18/77
[11:30:48.050] INFO: ROC 5 masking pixel 18/78
[11:30:48.050] INFO: ROC 5 masking pixel 18/79
[11:30:48.050] INFO: ROC 5 masking pixel 19/0
[11:30:48.050] INFO: ROC 5 masking pixel 19/1
[11:30:48.050] INFO: ROC 5 masking pixel 19/2
[11:30:48.051] INFO: ROC 5 masking pixel 19/3
[11:30:48.051] INFO: ROC 5 masking pixel 19/4
[11:30:48.051] INFO: ROC 5 masking pixel 19/5
[11:30:48.051] INFO: ROC 5 masking pixel 19/6
[11:30:48.051] INFO: ROC 5 masking pixel 19/7
[11:30:48.051] INFO: ROC 5 masking pixel 19/8
[11:30:48.051] INFO: ROC 5 masking pixel 19/9
[11:30:48.051] INFO: ROC 5 masking pixel 19/10
[11:30:48.051] INFO: ROC 5 masking pixel 19/11
[11:30:48.051] INFO: ROC 5 masking pixel 19/12
[11:30:48.051] INFO: ROC 5 masking pixel 19/13
[11:30:48.051] INFO: ROC 5 masking pixel 19/14
[11:30:48.051] INFO: ROC 5 masking pixel 19/15
[11:30:48.051] INFO: ROC 5 masking pixel 19/16
[11:30:48.051] INFO: ROC 5 masking pixel 19/17
[11:30:48.051] INFO: ROC 5 masking pixel 19/18
[11:30:48.051] INFO: ROC 5 masking pixel 19/19
[11:30:48.051] INFO: ROC 5 masking pixel 19/20
[11:30:48.051] INFO: ROC 5 masking pixel 19/21
[11:30:48.051] INFO: ROC 5 masking pixel 19/22
[11:30:48.051] INFO: ROC 5 masking pixel 19/23
[11:30:48.051] INFO: ROC 5 masking pixel 19/24
[11:30:48.051] INFO: ROC 5 masking pixel 19/25
[11:30:48.051] INFO: ROC 5 masking pixel 19/26
[11:30:48.051] INFO: ROC 5 masking pixel 19/27
[11:30:48.051] INFO: ROC 5 masking pixel 19/28
[11:30:48.051] INFO: ROC 5 masking pixel 19/29
[11:30:48.051] INFO: ROC 5 masking pixel 19/30
[11:30:48.051] INFO: ROC 5 masking pixel 19/31
[11:30:48.051] INFO: ROC 5 masking pixel 19/32
[11:30:48.051] INFO: ROC 5 masking pixel 19/33
[11:30:48.051] INFO: ROC 5 masking pixel 19/34
[11:30:48.051] INFO: ROC 5 masking pixel 19/35
[11:30:48.051] INFO: ROC 5 masking pixel 19/36
[11:30:48.051] INFO: ROC 5 masking pixel 19/37
[11:30:48.051] INFO: ROC 5 masking pixel 19/38
[11:30:48.051] INFO: ROC 5 masking pixel 19/39
[11:30:48.051] INFO: ROC 5 masking pixel 19/40
[11:30:48.052] INFO: ROC 5 masking pixel 19/41
[11:30:48.052] INFO: ROC 5 masking pixel 19/42
[11:30:48.052] INFO: ROC 5 masking pixel 19/43
[11:30:48.052] INFO: ROC 5 masking pixel 19/44
[11:30:48.052] INFO: ROC 5 masking pixel 19/45
[11:30:48.052] INFO: ROC 5 masking pixel 19/46
[11:30:48.052] INFO: ROC 5 masking pixel 19/47
[11:30:48.052] INFO: ROC 5 masking pixel 19/48
[11:30:48.052] INFO: ROC 5 masking pixel 19/49
[11:30:48.052] INFO: ROC 5 masking pixel 19/50
[11:30:48.052] INFO: ROC 5 masking pixel 19/51
[11:30:48.052] INFO: ROC 5 masking pixel 19/52
[11:30:48.052] INFO: ROC 5 masking pixel 19/53
[11:30:48.052] INFO: ROC 5 masking pixel 19/54
[11:30:48.052] INFO: ROC 5 masking pixel 19/55
[11:30:48.052] INFO: ROC 5 masking pixel 19/56
[11:30:48.052] INFO: ROC 5 masking pixel 19/57
[11:30:48.052] INFO: ROC 5 masking pixel 19/58
[11:30:48.052] INFO: ROC 5 masking pixel 19/59
[11:30:48.052] INFO: ROC 5 masking pixel 19/60
[11:30:48.052] INFO: ROC 5 masking pixel 19/61
[11:30:48.052] INFO: ROC 5 masking pixel 19/62
[11:30:48.052] INFO: ROC 5 masking pixel 19/63
[11:30:48.052] INFO: ROC 5 masking pixel 19/64
[11:30:48.052] INFO: ROC 5 masking pixel 19/65
[11:30:48.052] INFO: ROC 5 masking pixel 19/66
[11:30:48.052] INFO: ROC 5 masking pixel 19/67
[11:30:48.052] INFO: ROC 5 masking pixel 19/68
[11:30:48.052] INFO: ROC 5 masking pixel 19/69
[11:30:48.052] INFO: ROC 5 masking pixel 19/70
[11:30:48.052] INFO: ROC 5 masking pixel 19/71
[11:30:48.052] INFO: ROC 5 masking pixel 19/72
[11:30:48.052] INFO: ROC 5 masking pixel 19/73
[11:30:48.052] INFO: ROC 5 masking pixel 19/74
[11:30:48.052] INFO: ROC 5 masking pixel 19/75
[11:30:48.052] INFO: ROC 5 masking pixel 19/76
[11:30:48.052] INFO: ROC 5 masking pixel 19/77
[11:30:48.052] INFO: ROC 5 masking pixel 19/78
[11:30:48.052] INFO: ROC 5 masking pixel 19/79
[11:30:48.053] DEBUG: <PixTestAlive.cc/~PixTestAlive:L115> PixTestAlive dtor
[11:30:48.080] INFO: enter test to run
[11:31:28.196] INFO: test: Xray setting parameters: ->source=DCLowRate<-
[11:31:28.197] DEBUG: <PixTestParameters.cc/setTestParameter:L119> PixTestParameters: ->Xray<-
[11:31:28.197] DEBUG: <PixTestParameters.cc/setTestParameter:L124> setting source to new value DCLowRate
[11:31:28.197] INFO: running: xray
[11:31:28.197] DEBUG: <PixTestXray.cc/init:L135> PixTestXray::init()
[11:31:28.197] DEBUG: <PixTestXray.cc/PixTestXray:L28> PixTestXray ctor(PixSetup &a, string, TGTab *)
[11:31:28.197] INFO: readGainPedestalParameters /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//phCalibrationFitErr35_C0.dat .. /home/uicpirepix2/ProductionTestResults/M-L-1-47_FPIXTest-17C-FNAL-161026-0927-150V_2016-10-26_09h27m_1477492067/000_FPIXTest_p17//phCalibrationFitErr35_C15.dat
[11:31:28.449] DEBUG: <PixTestXray.cc/runCommand:L109> running command: phrun
[11:31:28.449] INFO: ----------------------------------------------------------------------
[11:31:28.449] INFO: PixTestXray::doPhRun() fParRunSeconds = 100
[11:31:28.449] INFO: ----------------------------------------------------------------------
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/0
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/1
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/2
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/3
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/4
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/5
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/6
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/7
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/8
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/9
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/10
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/11
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/12
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/13
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/14
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/15
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/16
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/17
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/18
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/19
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/20
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/21
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/22
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/23
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/24
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/25
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/26
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/27
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/28
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/29
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/30
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/31
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/32
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/33
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/34
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/35
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/36
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/37
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/38
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/39
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/40
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/41
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/42
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/43
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/44
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/45
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/46
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/47
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/48
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/49
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/50
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/51
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/52
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/53
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/54
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/55
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/56
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/57
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/58
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/59
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/60
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/61
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/62
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/63
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/64
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/65
[11:31:28.453] INFO: ROC 5 masking hot pixel 18/66
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/67
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/68
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/69
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/70
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/71
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/72
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/73
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/74
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/75
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/76
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/77
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/78
[11:31:28.454] INFO: ROC 5 masking hot pixel 18/79
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/0
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/1
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/2
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/3
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/4
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/5
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/6
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/7
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/8
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/9
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/10
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/11
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/12
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/13
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/14
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/15
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/16
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/17
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/18
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/19
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/20
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/21
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/22
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/23
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/24
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/25
[11:31:28.454] INFO: ROC 5 masking hot pixel 19/26
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/27
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/28
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/29
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/30
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/31
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/32
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/33
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/34
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/35
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/36
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/37
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/38
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/39
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/40
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/41
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/42
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/43
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/44
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/45
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/46
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/47
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/48
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/49
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/50
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/51
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/52
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/53
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/54
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/55
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/56
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/57
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/58
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/59
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/60
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/61
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/62
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/63
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/64
[11:31:28.455] INFO: ROC 5 masking hot pixel 19/65
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/66
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/67
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/68
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/69
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/70
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/71
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/72
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/73
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/74
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/75
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/76
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/77
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/78
[11:31:28.456] INFO: ROC 5 masking hot pixel 19/79
[11:31:28.456] INFO: ROC 5 masking pixel 18/0
[11:31:28.456] INFO: ROC 5 masking pixel 18/1
[11:31:28.456] INFO: ROC 5 masking pixel 18/2
[11:31:28.456] INFO: ROC 5 masking pixel 18/3
[11:31:28.456] INFO: ROC 5 masking pixel 18/4
[11:31:28.456] INFO: ROC 5 masking pixel 18/5
[11:31:28.456] INFO: ROC 5 masking pixel 18/6
[11:31:28.456] INFO: ROC 5 masking pixel 18/7
[11:31:28.456] INFO: ROC 5 masking pixel 18/8
[11:31:28.456] INFO: ROC 5 masking pixel 18/9
[11:31:28.456] INFO: ROC 5 masking pixel 18/10
[11:31:28.456] INFO: ROC 5 masking pixel 18/11
[11:31:28.456] INFO: ROC 5 masking pixel 18/12
[11:31:28.456] INFO: ROC 5 masking pixel 18/13
[11:31:28.456] INFO: ROC 5 masking pixel 18/14
[11:31:28.456] INFO: ROC 5 masking pixel 18/15
[11:31:28.456] INFO: ROC 5 masking pixel 18/16
[11:31:28.456] INFO: ROC 5 masking pixel 18/17
[11:31:28.456] INFO: ROC 5 masking pixel 18/18
[11:31:28.456] INFO: ROC 5 masking pixel 18/19
[11:31:28.456] INFO: ROC 5 masking pixel 18/20
[11:31:28.456] INFO: ROC 5 masking pixel 18/21
[11:31:28.456] INFO: ROC 5 masking pixel 18/22
[11:31:28.456] INFO: ROC 5 masking pixel 18/23
[11:31:28.456] INFO: ROC 5 masking pixel 18/24
[11:31:28.456] INFO: ROC 5 masking pixel 18/25
[11:31:28.456] INFO: ROC 5 masking pixel 18/26
[11:31:28.456] INFO: ROC 5 masking pixel 18/27
[11:31:28.456] INFO: ROC 5 masking pixel 18/28
[11:31:28.457] INFO: ROC 5 masking pixel 18/29
[11:31:28.457] INFO: ROC 5 masking pixel 18/30
[11:31:28.457] INFO: ROC 5 masking pixel 18/31
[11:31:28.457] INFO: ROC 5 masking pixel 18/32
[11:31:28.457] INFO: ROC 5 masking pixel 18/33
[11:31:28.457] INFO: ROC 5 masking pixel 18/34
[11:31:28.457] INFO: ROC 5 masking pixel 18/35
[11:31:28.457] INFO: ROC 5 masking pixel 18/36
[11:31:28.457] INFO: ROC 5 masking pixel 18/37
[11:31:28.457] INFO: ROC 5 masking pixel 18/38
[11:31:28.457] INFO: ROC 5 masking pixel 18/39
[11:31:28.457] INFO: ROC 5 masking pixel 18/40
[11:31:28.457] INFO: ROC 5 masking pixel 18/41
[11:31:28.457] INFO: ROC 5 masking pixel 18/42
[11:31:28.457] INFO: ROC 5 masking pixel 18/43
[11:31:28.457] INFO: ROC 5 masking pixel 18/44
[11:31:28.457] INFO: ROC 5 masking pixel 18/45
[11:31:28.457] INFO: ROC 5 masking pixel 18/46
[11:31:28.457] INFO: ROC 5 masking pixel 18/47
[11:31:28.457] INFO: ROC 5 masking pixel 18/48
[11:31:28.457] INFO: ROC 5 masking pixel 18/49
[11:31:28.457] INFO: ROC 5 masking pixel 18/50
[11:31:28.457] INFO: ROC 5 masking pixel 18/51
[11:31:28.457] INFO: ROC 5 masking pixel 18/52
[11:31:28.457] INFO: ROC 5 masking pixel 18/53
[11:31:28.457] INFO: ROC 5 masking pixel 18/54
[11:31:28.457] INFO: ROC 5 masking pixel 18/55
[11:31:28.457] INFO: ROC 5 masking pixel 18/56
[11:31:28.457] INFO: ROC 5 masking pixel 18/57
[11:31:28.457] INFO: ROC 5 masking pixel 18/58
[11:31:28.457] INFO: ROC 5 masking pixel 18/59
[11:31:28.457] INFO: ROC 5 masking pixel 18/60
[11:31:28.457] INFO: ROC 5 masking pixel 18/61
[11:31:28.457] INFO: ROC 5 masking pixel 18/62
[11:31:28.457] INFO: ROC 5 masking pixel 18/63
[11:31:28.457] INFO: ROC 5 masking pixel 18/64
[11:31:28.457] INFO: ROC 5 masking pixel 18/65
[11:31:28.457] INFO: ROC 5 masking pixel 18/66
[11:31:28.457] INFO: ROC 5 masking pixel 18/67
[11:31:28.457] INFO: ROC 5 masking pixel 18/68
[11:31:28.457] INFO: ROC 5 masking pixel 18/69
[11:31:28.458] INFO: ROC 5 masking pixel 18/70
[11:31:28.458] INFO: ROC 5 masking pixel 18/71
[11:31:28.458] INFO: ROC 5 masking pixel 18/72
[11:31:28.458] INFO: ROC 5 masking pixel 18/73
[11:31:28.458] INFO: ROC 5 masking pixel 18/74
[11:31:28.458] INFO: ROC 5 masking pixel 18/75
[11:31:28.458] INFO: ROC 5 masking pixel 18/76
[11:31:28.458] INFO: ROC 5 masking pixel 18/77
[11:31:28.458] INFO: ROC 5 masking pixel 18/78
[11:31:28.458] INFO: ROC 5 masking pixel 18/79
[11:31:28.458] INFO: ROC 5 masking pixel 19/0
[11:31:28.458] INFO: ROC 5 masking pixel 19/1
[11:31:28.458] INFO: ROC 5 masking pixel 19/2
[11:31:28.458] INFO: ROC 5 masking pixel 19/3
[11:31:28.458] INFO: ROC 5 masking pixel 19/4
[11:31:28.458] INFO: ROC 5 masking pixel 19/5
[11:31:28.458] INFO: ROC 5 masking pixel 19/6
[11:31:28.458] INFO: ROC 5 masking pixel 19/7
[11:31:28.458] INFO: ROC 5 masking pixel 19/8
[11:31:28.458] INFO: ROC 5 masking pixel 19/9
[11:31:28.458] INFO: ROC 5 masking pixel 19/10
[11:31:28.458] INFO: ROC 5 masking pixel 19/11
[11:31:28.458] INFO: ROC 5 masking pixel 19/12
[11:31:28.458] INFO: ROC 5 masking pixel 19/13
[11:31:28.458] INFO: ROC 5 masking pixel 19/14
[11:31:28.458] INFO: ROC 5 masking pixel 19/15
[11:31:28.458] INFO: ROC 5 masking pixel 19/16
[11:31:28.458] INFO: ROC 5 masking pixel 19/17
[11:31:28.458] INFO: ROC 5 masking pixel 19/18
[11:31:28.458] INFO: ROC 5 masking pixel 19/19
[11:31:28.458] INFO: ROC 5 masking pixel 19/20
[11:31:28.458] INFO: ROC 5 masking pixel 19/21
[11:31:28.458] INFO: ROC 5 masking pixel 19/22
[11:31:28.458] INFO: ROC 5 masking pixel 19/23
[11:31:28.458] INFO: ROC 5 masking pixel 19/24
[11:31:28.458] INFO: ROC 5 masking pixel 19/25
[11:31:28.458] INFO: ROC 5 masking pixel 19/26
[11:31:28.461] INFO: ROC 5 masking pixel 19/27
[11:31:28.461] INFO: ROC 5 masking pixel 19/28
[11:31:28.461] INFO: ROC 5 masking pixel 19/29
[11:31:28.461] INFO: ROC 5 masking pixel 19/30
[11:31:28.461] INFO: ROC 5 masking pixel 19/31
[11:31:28.461] INFO: ROC 5 masking pixel 19/32
[11:31:28.461] INFO: ROC 5 masking pixel 19/33
[11:31:28.461] INFO: ROC 5 masking pixel 19/34
[11:31:28.461] INFO: ROC 5 masking pixel 19/35
[11:31:28.461] INFO: ROC 5 masking pixel 19/36
[11:31:28.461] INFO: ROC 5 masking pixel 19/37
[11:31:28.461] INFO: ROC 5 masking pixel 19/38
[11:31:28.461] INFO: ROC 5 masking pixel 19/39
[11:31:28.461] INFO: ROC 5 masking pixel 19/40
[11:31:28.461] INFO: ROC 5 masking pixel 19/41
[11:31:28.461] INFO: ROC 5 masking pixel 19/42
[11:31:28.462] INFO: ROC 5 masking pixel 19/43
[11:31:28.462] INFO: ROC 5 masking pixel 19/44
[11:31:28.462] INFO: ROC 5 masking pixel 19/45
[11:31:28.462] INFO: ROC 5 masking pixel 19/46
[11:31:28.462] INFO: ROC 5 masking pixel 19/47
[11:31:28.462] INFO: ROC 5 masking pixel 19/48
[11:31:28.462] INFO: ROC 5 masking pixel 19/49
[11:31:28.462] INFO: ROC 5 masking pixel 19/50
[11:31:28.462] INFO: ROC 5 masking pixel 19/51
[11:31:28.462] INFO: ROC 5 masking pixel 19/52
[11:31:28.462] INFO: ROC 5 masking pixel 19/53
[11:31:28.462] INFO: ROC 5 masking pixel 19/54
[11:31:28.462] INFO: ROC 5 masking pixel 19/55
[11:31:28.462] INFO: ROC 5 masking pixel 19/56
[11:31:28.462] INFO: ROC 5 masking pixel 19/57
[11:31:28.462] INFO: ROC 5 masking pixel 19/58
[11:31:28.462] INFO: ROC 5 masking pixel 19/59
[11:31:28.462] INFO: ROC 5 masking pixel 19/60
[11:31:28.462] INFO: ROC 5 masking pixel 19/61
[11:31:28.462] INFO: ROC 5 masking pixel 19/62
[11:31:28.462] INFO: ROC 5 masking pixel 19/63
[11:31:28.462] INFO: ROC 5 masking pixel 19/64
[11:31:28.462] INFO: ROC 5 masking pixel 19/65
[11:31:28.462] INFO: ROC 5 masking pixel 19/66
[11:31:28.462] INFO: ROC 5 masking pixel 19/67
[11:31:28.462] INFO: ROC 5 masking pixel 19/68
[11:31:28.462] INFO: ROC 5 masking pixel 19/69
[11:31:28.462] INFO: ROC 5 masking pixel 19/70
[11:31:28.462] INFO: ROC 5 masking pixel 19/71
[11:31:28.462] INFO: ROC 5 masking pixel 19/72
[11:31:28.462] INFO: ROC 5 masking pixel 19/73
[11:31:28.462] INFO: ROC 5 masking pixel 19/74
[11:31:28.462] INFO: ROC 5 masking pixel 19/75
[11:31:28.462] INFO: ROC 5 masking pixel 19/76
[11:31:28.462] INFO: ROC 5 masking pixel 19/77
[11:31:28.462] INFO: ROC 5 masking pixel 19/78
[11:31:28.462] INFO: ROC 5 masking pixel 19/79
[11:31:29.425] INFO: PixTestXray::doPhRun start TriggerLoop with trigger frequency 100 kHz, period 405 and duration 100 seconds, fEventsMax = 10000000
[11:31:40.647] INFO: run duration 11 seconds, buffer almost full (81%), pausing triggers.
[11:31:40.650] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:32:06.315] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105627 events.
[11:32:09.933] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105627, pixels seen in all events: 6983834
[11:32:10.017] INFO: Resuming triggers.
[11:32:21.237] INFO: run duration 22 seconds, buffer almost full (81%), pausing triggers.
[11:32:21.241] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:32:46.971] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105396 events.
[11:32:50.560] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105396, pixels seen in all events: 6986926
[11:32:50.590] INFO: Resuming triggers.
[11:33:01.807] INFO: run duration 33 seconds, buffer almost full (81%), pausing triggers.
[11:33:01.810] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:33:27.524] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105065 events.
[11:33:31.253] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105065, pixels seen in all events: 6990631
[11:33:31.332] INFO: Resuming triggers.
[11:33:42.546] INFO: run duration 44 seconds, buffer almost full (81%), pausing triggers.
[11:33:42.550] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:34:08.210] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1104785 events.
[11:34:11.847] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1104785, pixels seen in all events: 6994101
[11:34:11.972] INFO: Resuming triggers.
[11:34:23.193] INFO: run duration 55 seconds, buffer almost full (81%), pausing triggers.
[11:34:23.201] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:34:48.881] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105456 events.
[11:34:52.526] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105456, pixels seen in all events: 6985524
[11:34:52.652] INFO: Resuming triggers.
[11:35:03.871] INFO: run duration 67 seconds, buffer almost full (81%), pausing triggers.
[11:35:03.879] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:35:29.541] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105227 events.
[11:35:33.544] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105227, pixels seen in all events: 6988561
[11:35:33.628] INFO: Resuming triggers.
[11:35:44.850] INFO: run duration 78 seconds, buffer almost full (81%), pausing triggers.
[11:35:44.853] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:36:09.955] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105554 events.
[11:36:14.072] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105554, pixels seen in all events: 6985083
[11:36:14.163] INFO: Resuming triggers.
[11:36:25.385] INFO: run duration 89 seconds, buffer almost full (81%), pausing triggers.
[11:36:25.388] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:36:48.696] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1105463 events.
[11:36:52.668] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1105463, pixels seen in all events: 6985897
[11:36:52.799] INFO: Resuming triggers.
[11:37:03.375] INFO: data taking finished, elapsed time: 100 seconds.
[11:37:03.585] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:37:26.634] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 1041943 events.
[11:37:30.450] DEBUG: <PixTestXray.cc/processData:L823> # events read: 1041943, pixels seen in all events: 6587965
[11:37:30.479] INFO: PixTest:: pg_setup set to default.
[11:37:30.482] INFO: PixTestXray::doPhRun() done
[11:37:30.482] DEBUG: <PixTestXray.cc/~PixTestXray:L218> PixTestXray dtor
[11:37:30.680] INFO: enter test to run
[11:38:15.306] INFO: test: Xray setting parameters: ->source=DCHighRate<-
[11:38:15.306] DEBUG: <PixTestParameters.cc/setTestParameter:L119> PixTestParameters: ->Xray<-
[11:38:15.306] DEBUG: <PixTestParameters.cc/setTestParameter:L124> setting source to new value DCHighRate
[11:38:15.306] INFO: running: xray
[11:38:15.306] DEBUG: <PixTestXray.cc/init:L135> PixTestXray::init()
[11:38:15.306] DEBUG: <PixTestXray.cc/PixTestXray:L28> PixTestXray ctor(PixSetup &a, string, TGTab *)
[11:38:15.307] DEBUG: <PixTestXray.cc/runCommand:L109> running command: phrun
[11:38:15.307] INFO: ----------------------------------------------------------------------
[11:38:15.307] INFO: PixTestXray::doPhRun() fParRunSeconds = 100
[11:38:15.307] INFO: ----------------------------------------------------------------------
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/0
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/1
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/2
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/3
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/4
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/5
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/6
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/7
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/8
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/9
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/10
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/11
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/12
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/13
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/14
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/15
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/16
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/17
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/18
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/19
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/20
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/21
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/22
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/23
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/24
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/25
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/26
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/27
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/28
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/29
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/30
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/31
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/32
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/33
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/34
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/35
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/36
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/37
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/38
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/39
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/40
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/41
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/42
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/43
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/44
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/45
[11:38:15.311] INFO: ROC 5 masking hot pixel 18/46
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/47
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/48
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/49
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/50
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/51
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/52
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/53
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/54
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/55
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/56
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/57
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/58
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/59
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/60
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/61
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/62
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/63
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/64
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/65
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/66
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/67
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/68
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/69
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/70
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/71
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/72
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/73
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/74
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/75
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/76
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/77
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/78
[11:38:15.312] INFO: ROC 5 masking hot pixel 18/79
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/0
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/1
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/2
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/3
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/4
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/5
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/6
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/7
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/8
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/9
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/10
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/11
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/12
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/13
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/14
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/15
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/16
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/17
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/18
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/19
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/20
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/21
[11:38:15.312] INFO: ROC 5 masking hot pixel 19/22
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/23
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/24
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/25
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/26
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/27
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/28
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/29
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/30
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/31
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/32
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/33
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/34
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/35
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/36
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/37
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/38
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/39
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/40
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/41
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/42
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/43
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/44
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/45
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/46
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/47
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/48
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/49
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/50
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/51
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/52
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/53
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/54
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/55
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/56
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/57
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/58
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/59
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/60
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/61
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/62
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/63
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/64
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/65
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/66
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/67
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/68
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/69
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/70
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/71
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/72
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/73
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/74
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/75
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/76
[11:38:15.313] INFO: ROC 5 masking hot pixel 19/77
[11:38:15.314] INFO: ROC 5 masking hot pixel 19/78
[11:38:15.314] INFO: ROC 5 masking hot pixel 19/79
[11:38:15.314] INFO: ROC 5 masking pixel 18/0
[11:38:15.314] INFO: ROC 5 masking pixel 18/1
[11:38:15.314] INFO: ROC 5 masking pixel 18/2
[11:38:15.314] INFO: ROC 5 masking pixel 18/3
[11:38:15.314] INFO: ROC 5 masking pixel 18/4
[11:38:15.314] INFO: ROC 5 masking pixel 18/5
[11:38:15.314] INFO: ROC 5 masking pixel 18/6
[11:38:15.314] INFO: ROC 5 masking pixel 18/7
[11:38:15.314] INFO: ROC 5 masking pixel 18/8
[11:38:15.314] INFO: ROC 5 masking pixel 18/9
[11:38:15.314] INFO: ROC 5 masking pixel 18/10
[11:38:15.314] INFO: ROC 5 masking pixel 18/11
[11:38:15.314] INFO: ROC 5 masking pixel 18/12
[11:38:15.314] INFO: ROC 5 masking pixel 18/13
[11:38:15.314] INFO: ROC 5 masking pixel 18/14
[11:38:15.314] INFO: ROC 5 masking pixel 18/15
[11:38:15.314] INFO: ROC 5 masking pixel 18/16
[11:38:15.314] INFO: ROC 5 masking pixel 18/17
[11:38:15.314] INFO: ROC 5 masking pixel 18/18
[11:38:15.314] INFO: ROC 5 masking pixel 18/19
[11:38:15.314] INFO: ROC 5 masking pixel 18/20
[11:38:15.314] INFO: ROC 5 masking pixel 18/21
[11:38:15.314] INFO: ROC 5 masking pixel 18/22
[11:38:15.314] INFO: ROC 5 masking pixel 18/23
[11:38:15.314] INFO: ROC 5 masking pixel 18/24
[11:38:15.314] INFO: ROC 5 masking pixel 18/25
[11:38:15.314] INFO: ROC 5 masking pixel 18/26
[11:38:15.314] INFO: ROC 5 masking pixel 18/27
[11:38:15.314] INFO: ROC 5 masking pixel 18/28
[11:38:15.314] INFO: ROC 5 masking pixel 18/29
[11:38:15.314] INFO: ROC 5 masking pixel 18/30
[11:38:15.314] INFO: ROC 5 masking pixel 18/31
[11:38:15.314] INFO: ROC 5 masking pixel 18/32
[11:38:15.314] INFO: ROC 5 masking pixel 18/33
[11:38:15.314] INFO: ROC 5 masking pixel 18/34
[11:38:15.314] INFO: ROC 5 masking pixel 18/35
[11:38:15.314] INFO: ROC 5 masking pixel 18/36
[11:38:15.316] INFO: ROC 5 masking pixel 18/37
[11:38:15.316] INFO: ROC 5 masking pixel 18/38
[11:38:15.316] INFO: ROC 5 masking pixel 18/39
[11:38:15.316] INFO: ROC 5 masking pixel 18/40
[11:38:15.316] INFO: ROC 5 masking pixel 18/41
[11:38:15.316] INFO: ROC 5 masking pixel 18/42
[11:38:15.317] INFO: ROC 5 masking pixel 18/43
[11:38:15.317] INFO: ROC 5 masking pixel 18/44
[11:38:15.317] INFO: ROC 5 masking pixel 18/45
[11:38:15.317] INFO: ROC 5 masking pixel 18/46
[11:38:15.317] INFO: ROC 5 masking pixel 18/47
[11:38:15.317] INFO: ROC 5 masking pixel 18/48
[11:38:15.317] INFO: ROC 5 masking pixel 18/49
[11:38:15.317] INFO: ROC 5 masking pixel 18/50
[11:38:15.317] INFO: ROC 5 masking pixel 18/51
[11:38:15.317] INFO: ROC 5 masking pixel 18/52
[11:38:15.317] INFO: ROC 5 masking pixel 18/53
[11:38:15.317] INFO: ROC 5 masking pixel 18/54
[11:38:15.317] INFO: ROC 5 masking pixel 18/55
[11:38:15.317] INFO: ROC 5 masking pixel 18/56
[11:38:15.317] INFO: ROC 5 masking pixel 18/57
[11:38:15.317] INFO: ROC 5 masking pixel 18/58
[11:38:15.317] INFO: ROC 5 masking pixel 18/59
[11:38:15.317] INFO: ROC 5 masking pixel 18/60
[11:38:15.317] INFO: ROC 5 masking pixel 18/61
[11:38:15.317] INFO: ROC 5 masking pixel 18/62
[11:38:15.317] INFO: ROC 5 masking pixel 18/63
[11:38:15.317] INFO: ROC 5 masking pixel 18/64
[11:38:15.317] INFO: ROC 5 masking pixel 18/65
[11:38:15.317] INFO: ROC 5 masking pixel 18/66
[11:38:15.317] INFO: ROC 5 masking pixel 18/67
[11:38:15.317] INFO: ROC 5 masking pixel 18/68
[11:38:15.317] INFO: ROC 5 masking pixel 18/69
[11:38:15.317] INFO: ROC 5 masking pixel 18/70
[11:38:15.317] INFO: ROC 5 masking pixel 18/71
[11:38:15.317] INFO: ROC 5 masking pixel 18/72
[11:38:15.317] INFO: ROC 5 masking pixel 18/73
[11:38:15.317] INFO: ROC 5 masking pixel 18/74
[11:38:15.317] INFO: ROC 5 masking pixel 18/75
[11:38:15.317] INFO: ROC 5 masking pixel 18/76
[11:38:15.317] INFO: ROC 5 masking pixel 18/77
[11:38:15.317] INFO: ROC 5 masking pixel 18/78
[11:38:15.317] INFO: ROC 5 masking pixel 18/79
[11:38:15.317] INFO: ROC 5 masking pixel 19/0
[11:38:15.318] INFO: ROC 5 masking pixel 19/1
[11:38:15.318] INFO: ROC 5 masking pixel 19/2
[11:38:15.318] INFO: ROC 5 masking pixel 19/3
[11:38:15.318] INFO: ROC 5 masking pixel 19/4
[11:38:15.318] INFO: ROC 5 masking pixel 19/5
[11:38:15.318] INFO: ROC 5 masking pixel 19/6
[11:38:15.318] INFO: ROC 5 masking pixel 19/7
[11:38:15.318] INFO: ROC 5 masking pixel 19/8
[11:38:15.318] INFO: ROC 5 masking pixel 19/9
[11:38:15.318] INFO: ROC 5 masking pixel 19/10
[11:38:15.318] INFO: ROC 5 masking pixel 19/11
[11:38:15.318] INFO: ROC 5 masking pixel 19/12
[11:38:15.318] INFO: ROC 5 masking pixel 19/13
[11:38:15.318] INFO: ROC 5 masking pixel 19/14
[11:38:15.318] INFO: ROC 5 masking pixel 19/15
[11:38:15.318] INFO: ROC 5 masking pixel 19/16
[11:38:15.318] INFO: ROC 5 masking pixel 19/17
[11:38:15.318] INFO: ROC 5 masking pixel 19/18
[11:38:15.318] INFO: ROC 5 masking pixel 19/19
[11:38:15.318] INFO: ROC 5 masking pixel 19/20
[11:38:15.318] INFO: ROC 5 masking pixel 19/21
[11:38:15.318] INFO: ROC 5 masking pixel 19/22
[11:38:15.318] INFO: ROC 5 masking pixel 19/23
[11:38:15.318] INFO: ROC 5 masking pixel 19/24
[11:38:15.318] INFO: ROC 5 masking pixel 19/25
[11:38:15.318] INFO: ROC 5 masking pixel 19/26
[11:38:15.318] INFO: ROC 5 masking pixel 19/27
[11:38:15.318] INFO: ROC 5 masking pixel 19/28
[11:38:15.318] INFO: ROC 5 masking pixel 19/29
[11:38:15.318] INFO: ROC 5 masking pixel 19/30
[11:38:15.318] INFO: ROC 5 masking pixel 19/31
[11:38:15.318] INFO: ROC 5 masking pixel 19/32
[11:38:15.318] INFO: ROC 5 masking pixel 19/33
[11:38:15.318] INFO: ROC 5 masking pixel 19/34
[11:38:15.318] INFO: ROC 5 masking pixel 19/35
[11:38:15.318] INFO: ROC 5 masking pixel 19/36
[11:38:15.318] INFO: ROC 5 masking pixel 19/37
[11:38:15.318] INFO: ROC 5 masking pixel 19/38
[11:38:15.319] INFO: ROC 5 masking pixel 19/39
[11:38:15.319] INFO: ROC 5 masking pixel 19/40
[11:38:15.319] INFO: ROC 5 masking pixel 19/41
[11:38:15.319] INFO: ROC 5 masking pixel 19/42
[11:38:15.319] INFO: ROC 5 masking pixel 19/43
[11:38:15.319] INFO: ROC 5 masking pixel 19/44
[11:38:15.319] INFO: ROC 5 masking pixel 19/45
[11:38:15.319] INFO: ROC 5 masking pixel 19/46
[11:38:15.319] INFO: ROC 5 masking pixel 19/47
[11:38:15.319] INFO: ROC 5 masking pixel 19/48
[11:38:15.319] INFO: ROC 5 masking pixel 19/49
[11:38:15.319] INFO: ROC 5 masking pixel 19/50
[11:38:15.319] INFO: ROC 5 masking pixel 19/51
[11:38:15.319] INFO: ROC 5 masking pixel 19/52
[11:38:15.319] INFO: ROC 5 masking pixel 19/53
[11:38:15.319] INFO: ROC 5 masking pixel 19/54
[11:38:15.319] INFO: ROC 5 masking pixel 19/55
[11:38:15.319] INFO: ROC 5 masking pixel 19/56
[11:38:15.319] INFO: ROC 5 masking pixel 19/57
[11:38:15.319] INFO: ROC 5 masking pixel 19/58
[11:38:15.319] INFO: ROC 5 masking pixel 19/59
[11:38:15.319] INFO: ROC 5 masking pixel 19/60
[11:38:15.319] INFO: ROC 5 masking pixel 19/61
[11:38:15.319] INFO: ROC 5 masking pixel 19/62
[11:38:15.319] INFO: ROC 5 masking pixel 19/63
[11:38:15.319] INFO: ROC 5 masking pixel 19/64
[11:38:15.319] INFO: ROC 5 masking pixel 19/65
[11:38:15.319] INFO: ROC 5 masking pixel 19/66
[11:38:15.319] INFO: ROC 5 masking pixel 19/67
[11:38:15.319] INFO: ROC 5 masking pixel 19/68
[11:38:15.319] INFO: ROC 5 masking pixel 19/69
[11:38:15.319] INFO: ROC 5 masking pixel 19/70
[11:38:15.319] INFO: ROC 5 masking pixel 19/71
[11:38:15.319] INFO: ROC 5 masking pixel 19/72
[11:38:15.319] INFO: ROC 5 masking pixel 19/73
[11:38:15.319] INFO: ROC 5 masking pixel 19/74
[11:38:15.319] INFO: ROC 5 masking pixel 19/75
[11:38:15.319] INFO: ROC 5 masking pixel 19/76
[11:38:15.319] INFO: ROC 5 masking pixel 19/77
[11:38:15.319] INFO: ROC 5 masking pixel 19/78
[11:38:15.320] INFO: ROC 5 masking pixel 19/79
[11:38:16.279] INFO: PixTestXray::doPhRun start TriggerLoop with trigger frequency 100 kHz, period 405 and duration 100 seconds, fEventsMax = 10000000
[11:38:22.816] INFO: run duration 6 seconds, buffer almost full (81%), pausing triggers.
[11:38:22.820] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:38:46.818] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644108 events.
[11:38:53.630] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644108, pixels seen in all events: 12522958
[11:38:53.689] INFO: Resuming triggers.
[11:39:00.228] INFO: run duration 13 seconds, buffer almost full (81%), pausing triggers.
[11:39:00.231] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:39:24.366] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644157 events.
[11:39:31.291] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644157, pixels seen in all events: 12522471
[11:39:31.367] INFO: Resuming triggers.
[11:39:37.908] INFO: run duration 19 seconds, buffer almost full (81%), pausing triggers.
[11:39:37.911] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:40:01.972] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644354 events.
[11:40:08.326] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644354, pixels seen in all events: 12520563
[11:40:08.385] INFO: Resuming triggers.
[11:40:14.921] INFO: run duration 26 seconds, buffer almost full (81%), pausing triggers.
[11:40:14.925] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:40:38.513] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643944 events.
[11:40:44.916] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643944, pixels seen in all events: 12524402
[11:40:44.974] INFO: Resuming triggers.
[11:40:51.514] INFO: run duration 32 seconds, buffer almost full (81%), pausing triggers.
[11:40:51.518] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:41:15.051] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644317 events.
[11:41:21.368] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644317, pixels seen in all events: 12520780
[11:41:21.426] INFO: Resuming triggers.
[11:41:27.967] INFO: run duration 39 seconds, buffer almost full (81%), pausing triggers.
[11:41:27.970] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:41:51.569] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644337 events.
[11:41:57.970] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644337, pixels seen in all events: 12520054
[11:41:58.027] INFO: Resuming triggers.
[11:42:04.567] INFO: run duration 45 seconds, buffer almost full (81%), pausing triggers.
[11:42:04.570] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:42:27.316] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644224 events.
[11:42:33.664] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644224, pixels seen in all events: 12521157
[11:42:33.721] INFO: Resuming triggers.
[11:42:40.261] INFO: run duration 52 seconds, buffer almost full (81%), pausing triggers.
[11:42:40.264] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:43:03.729] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 644290 events.
[11:43:10.154] DEBUG: <PixTestXray.cc/processData:L823> # events read: 644290, pixels seen in all events: 12521492
[11:43:10.211] INFO: Resuming triggers.
[11:43:16.744] INFO: run duration 58 seconds, buffer almost full (81%), pausing triggers.
[11:43:16.747] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:43:40.184] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643536 events.
[11:43:46.543] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643536, pixels seen in all events: 12530054
[11:43:46.602] INFO: Resuming triggers.
[11:43:53.137] INFO: run duration 65 seconds, buffer almost full (81%), pausing triggers.
[11:43:53.140] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:44:16.605] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643811 events.
[11:44:22.918] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643811, pixels seen in all events: 12526985
[11:44:22.978] INFO: Resuming triggers.
[11:44:29.510] INFO: run duration 71 seconds, buffer almost full (81%), pausing triggers.
[11:44:29.513] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:44:53.188] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643437 events.
[11:44:59.517] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643437, pixels seen in all events: 12531314
[11:44:59.575] INFO: Resuming triggers.
[11:45:06.106] INFO: run duration 78 seconds, buffer almost full (81%), pausing triggers.
[11:45:06.109] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:45:29.669] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643339 events.
[11:45:36.076] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643339, pixels seen in all events: 12532436
[11:45:36.134] INFO: Resuming triggers.
[11:45:42.666] INFO: run duration 84 seconds, buffer almost full (81%), pausing triggers.
[11:45:42.669] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:46:06.129] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643468 events.
[11:46:12.403] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643468, pixels seen in all events: 12529978
[11:46:12.459] INFO: Resuming triggers.
[11:46:18.989] INFO: run duration 91 seconds, buffer almost full (81%), pausing triggers.
[11:46:18.992] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:46:42.608] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643313 events.
[11:46:48.960] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643313, pixels seen in all events: 12533169
[11:46:49.017] INFO: Resuming triggers.
[11:46:55.551] INFO: run duration 97 seconds, buffer almost full (81%), pausing triggers.
[11:46:55.554] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:47:19.136] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 643663 events.
[11:47:25.521] DEBUG: <PixTestXray.cc/processData:L823> # events read: 643663, pixels seen in all events: 12528124
[11:47:25.581] INFO: Resuming triggers.
[11:47:27.880] INFO: data taking finished, elapsed time: 100 seconds.
[11:47:28.076] DEBUG: <PixTestXray.cc/processData:L754> Getting Event Buffer
[11:47:36.507] DEBUG: <PixTestXray.cc/processData:L772> Processing Data: 226500 events.
[11:47:38.739] DEBUG: <PixTestXray.cc/processData:L823> # events read: 226500, pixels seen in all events: 4408877
[11:47:38.755] INFO: PixTest:: pg_setup set to default.
[11:47:38.758] INFO: PixTestXray::doPhRun() done
[11:47:38.758] DEBUG: <PixTestXray.cc/~PixTestXray:L218> PixTestXray dtor
[11:47:38.907] INFO: enter test to run
[11:47:58.398] INFO: test: HighRate no parameter change
[11:47:58.398] INFO: running: highrate
[11:47:58.398] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[11:47:58.398] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[11:47:58.398] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[11:47:58.399] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: caldelscan
[11:47:58.399] INFO: ----------------------------------------------------------------------
[11:47:58.399] INFO: PixTestHighRate::calDelScan() ntrig = 10, vcal = 200
[11:47:58.399] INFO: ----------------------------------------------------------------------
[11:47:58.561] INFO: Expecting 768 events.
[11:47:59.694] INFO: 768 events read in total (418ms).
[11:47:59.695] INFO: Test took 1289ms.
[11:47:59.699] INFO: ROC 5 masking pixel 18/0
[11:47:59.700] INFO: ROC 5 masking pixel 18/1
[11:47:59.700] INFO: ROC 5 masking pixel 18/2
[11:47:59.700] INFO: ROC 5 masking pixel 18/3
[11:47:59.700] INFO: ROC 5 masking pixel 18/4
[11:47:59.700] INFO: ROC 5 masking pixel 18/5
[11:47:59.700] INFO: ROC 5 masking pixel 18/6
[11:47:59.700] INFO: ROC 5 masking pixel 18/7
[11:47:59.700] INFO: ROC 5 masking pixel 18/8
[11:47:59.700] INFO: ROC 5 masking pixel 18/9
[11:47:59.700] INFO: ROC 5 masking pixel 18/10
[11:47:59.700] INFO: ROC 5 masking pixel 18/11
[11:47:59.700] INFO: ROC 5 masking pixel 18/12
[11:47:59.700] INFO: ROC 5 masking pixel 18/13
[11:47:59.700] INFO: ROC 5 masking pixel 18/14
[11:47:59.700] INFO: ROC 5 masking pixel 18/15
[11:47:59.700] INFO: ROC 5 masking pixel 18/16
[11:47:59.700] INFO: ROC 5 masking pixel 18/17
[11:47:59.700] INFO: ROC 5 masking pixel 18/18
[11:47:59.700] INFO: ROC 5 masking pixel 18/19
[11:47:59.700] INFO: ROC 5 masking pixel 18/20
[11:47:59.700] INFO: ROC 5 masking pixel 18/21
[11:47:59.700] INFO: ROC 5 masking pixel 18/22
[11:47:59.700] INFO: ROC 5 masking pixel 18/23
[11:47:59.700] INFO: ROC 5 masking pixel 18/24
[11:47:59.700] INFO: ROC 5 masking pixel 18/25
[11:47:59.700] INFO: ROC 5 masking pixel 18/26
[11:47:59.700] INFO: ROC 5 masking pixel 18/27
[11:47:59.700] INFO: ROC 5 masking pixel 18/28
[11:47:59.700] INFO: ROC 5 masking pixel 18/29
[11:47:59.700] INFO: ROC 5 masking pixel 18/30
[11:47:59.700] INFO: ROC 5 masking pixel 18/31
[11:47:59.700] INFO: ROC 5 masking pixel 18/32
[11:47:59.701] INFO: ROC 5 masking pixel 18/33
[11:47:59.701] INFO: ROC 5 masking pixel 18/34
[11:47:59.701] INFO: ROC 5 masking pixel 18/35
[11:47:59.701] INFO: ROC 5 masking pixel 18/36
[11:47:59.701] INFO: ROC 5 masking pixel 18/37
[11:47:59.701] INFO: ROC 5 masking pixel 18/38
[11:47:59.701] INFO: ROC 5 masking pixel 18/39
[11:47:59.701] INFO: ROC 5 masking pixel 18/40
[11:47:59.701] INFO: ROC 5 masking pixel 18/41
[11:47:59.701] INFO: ROC 5 masking pixel 18/42
[11:47:59.701] INFO: ROC 5 masking pixel 18/43
[11:47:59.701] INFO: ROC 5 masking pixel 18/44
[11:47:59.701] INFO: ROC 5 masking pixel 18/45
[11:47:59.701] INFO: ROC 5 masking pixel 18/46
[11:47:59.701] INFO: ROC 5 masking pixel 18/47
[11:47:59.701] INFO: ROC 5 masking pixel 18/48
[11:47:59.701] INFO: ROC 5 masking pixel 18/49
[11:47:59.701] INFO: ROC 5 masking pixel 18/50
[11:47:59.701] INFO: ROC 5 masking pixel 18/51
[11:47:59.701] INFO: ROC 5 masking pixel 18/52
[11:47:59.701] INFO: ROC 5 masking pixel 18/53
[11:47:59.701] INFO: ROC 5 masking pixel 18/54
[11:47:59.701] INFO: ROC 5 masking pixel 18/55
[11:47:59.701] INFO: ROC 5 masking pixel 18/56
[11:47:59.701] INFO: ROC 5 masking pixel 18/57
[11:47:59.701] INFO: ROC 5 masking pixel 18/58
[11:47:59.701] INFO: ROC 5 masking pixel 18/59
[11:47:59.701] INFO: ROC 5 masking pixel 18/60
[11:47:59.701] INFO: ROC 5 masking pixel 18/61
[11:47:59.701] INFO: ROC 5 masking pixel 18/62
[11:47:59.701] INFO: ROC 5 masking pixel 18/63
[11:47:59.701] INFO: ROC 5 masking pixel 18/64
[11:47:59.701] INFO: ROC 5 masking pixel 18/65
[11:47:59.701] INFO: ROC 5 masking pixel 18/66
[11:47:59.701] INFO: ROC 5 masking pixel 18/67
[11:47:59.701] INFO: ROC 5 masking pixel 18/68
[11:47:59.702] INFO: ROC 5 masking pixel 18/69
[11:47:59.702] INFO: ROC 5 masking pixel 18/70
[11:47:59.702] INFO: ROC 5 masking pixel 18/71
[11:47:59.702] INFO: ROC 5 masking pixel 18/72
[11:47:59.702] INFO: ROC 5 masking pixel 18/73
[11:47:59.702] INFO: ROC 5 masking pixel 18/74
[11:47:59.702] INFO: ROC 5 masking pixel 18/75
[11:47:59.702] INFO: ROC 5 masking pixel 18/76
[11:47:59.702] INFO: ROC 5 masking pixel 18/77
[11:47:59.702] INFO: ROC 5 masking pixel 18/78
[11:47:59.702] INFO: ROC 5 masking pixel 18/79
[11:47:59.702] INFO: ROC 5 masking pixel 19/0
[11:47:59.702] INFO: ROC 5 masking pixel 19/1
[11:47:59.702] INFO: ROC 5 masking pixel 19/2
[11:47:59.702] INFO: ROC 5 masking pixel 19/3
[11:47:59.702] INFO: ROC 5 masking pixel 19/4
[11:47:59.702] INFO: ROC 5 masking pixel 19/5
[11:47:59.702] INFO: ROC 5 masking pixel 19/6
[11:47:59.702] INFO: ROC 5 masking pixel 19/7
[11:47:59.702] INFO: ROC 5 masking pixel 19/8
[11:47:59.702] INFO: ROC 5 masking pixel 19/9
[11:47:59.702] INFO: ROC 5 masking pixel 19/10
[11:47:59.702] INFO: ROC 5 masking pixel 19/11
[11:47:59.702] INFO: ROC 5 masking pixel 19/12
[11:47:59.702] INFO: ROC 5 masking pixel 19/13
[11:47:59.702] INFO: ROC 5 masking pixel 19/14
[11:47:59.702] INFO: ROC 5 masking pixel 19/15
[11:47:59.702] INFO: ROC 5 masking pixel 19/16
[11:47:59.702] INFO: ROC 5 masking pixel 19/17
[11:47:59.702] INFO: ROC 5 masking pixel 19/18
[11:47:59.702] INFO: ROC 5 masking pixel 19/19
[11:47:59.702] INFO: ROC 5 masking pixel 19/20
[11:47:59.702] INFO: ROC 5 masking pixel 19/21
[11:47:59.702] INFO: ROC 5 masking pixel 19/22
[11:47:59.702] INFO: ROC 5 masking pixel 19/23
[11:47:59.702] INFO: ROC 5 masking pixel 19/24
[11:47:59.702] INFO: ROC 5 masking pixel 19/25
[11:47:59.703] INFO: ROC 5 masking pixel 19/26
[11:47:59.703] INFO: ROC 5 masking pixel 19/27
[11:47:59.703] INFO: ROC 5 masking pixel 19/28
[11:47:59.703] INFO: ROC 5 masking pixel 19/29
[11:47:59.703] INFO: ROC 5 masking pixel 19/30
[11:47:59.703] INFO: ROC 5 masking pixel 19/31
[11:47:59.703] INFO: ROC 5 masking pixel 19/32
[11:47:59.703] INFO: ROC 5 masking pixel 19/33
[11:47:59.703] INFO: ROC 5 masking pixel 19/34
[11:47:59.703] INFO: ROC 5 masking pixel 19/35
[11:47:59.703] INFO: ROC 5 masking pixel 19/36
[11:47:59.703] INFO: ROC 5 masking pixel 19/37
[11:47:59.703] INFO: ROC 5 masking pixel 19/38
[11:47:59.703] INFO: ROC 5 masking pixel 19/39
[11:47:59.703] INFO: ROC 5 masking pixel 19/40
[11:47:59.703] INFO: ROC 5 masking pixel 19/41
[11:47:59.703] INFO: ROC 5 masking pixel 19/42
[11:47:59.703] INFO: ROC 5 masking pixel 19/43
[11:47:59.703] INFO: ROC 5 masking pixel 19/44
[11:47:59.703] INFO: ROC 5 masking pixel 19/45
[11:47:59.703] INFO: ROC 5 masking pixel 19/46
[11:47:59.703] INFO: ROC 5 masking pixel 19/47
[11:47:59.703] INFO: ROC 5 masking pixel 19/48
[11:47:59.703] INFO: ROC 5 masking pixel 19/49
[11:47:59.703] INFO: ROC 5 masking pixel 19/50
[11:47:59.703] INFO: ROC 5 masking pixel 19/51
[11:47:59.703] INFO: ROC 5 masking pixel 19/52
[11:47:59.703] INFO: ROC 5 masking pixel 19/53
[11:47:59.703] INFO: ROC 5 masking pixel 19/54
[11:47:59.703] INFO: ROC 5 masking pixel 19/55
[11:47:59.703] INFO: ROC 5 masking pixel 19/56
[11:47:59.703] INFO: ROC 5 masking pixel 19/57
[11:47:59.703] INFO: ROC 5 masking pixel 19/58
[11:47:59.703] INFO: ROC 5 masking pixel 19/59
[11:47:59.703] INFO: ROC 5 masking pixel 19/60
[11:47:59.703] INFO: ROC 5 masking pixel 19/61
[11:47:59.703] INFO: ROC 5 masking pixel 19/62
[11:47:59.703] INFO: ROC 5 masking pixel 19/63
[11:47:59.703] INFO: ROC 5 masking pixel 19/64
[11:47:59.703] INFO: ROC 5 masking pixel 19/65
[11:47:59.704] INFO: ROC 5 masking pixel 19/66
[11:47:59.704] INFO: ROC 5 masking pixel 19/67
[11:47:59.704] INFO: ROC 5 masking pixel 19/68
[11:47:59.704] INFO: ROC 5 masking pixel 19/69
[11:47:59.704] INFO: ROC 5 masking pixel 19/70
[11:47:59.704] INFO: ROC 5 masking pixel 19/71
[11:47:59.704] INFO: ROC 5 masking pixel 19/72
[11:47:59.704] INFO: ROC 5 masking pixel 19/73
[11:47:59.704] INFO: ROC 5 masking pixel 19/74
[11:47:59.704] INFO: ROC 5 masking pixel 19/75
[11:47:59.704] INFO: ROC 5 masking pixel 19/76
[11:47:59.704] INFO: ROC 5 masking pixel 19/77
[11:47:59.704] INFO: ROC 5 masking pixel 19/78
[11:47:59.704] INFO: ROC 5 masking pixel 19/79
[11:47:59.707] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:00.498] INFO: Expecting 41600 events.
[11:48:03.764] INFO: 41600 events read in total (2739ms).
[11:48:03.766] INFO: Test took 4059ms.
[11:48:03.800] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:03.800] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 309141
[11:48:03.800] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step0_C0 .. HR_xeff_CalDelScan_step0_C15
[11:48:03.801] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:03.817] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:04.527] INFO: Expecting 41600 events.
[11:48:07.769] INFO: 41600 events read in total (2715ms).
[11:48:07.770] INFO: Test took 3953ms.
[11:48:07.805] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:07.805] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 317456
[11:48:07.805] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step1_C0 .. HR_xeff_CalDelScan_step1_C15
[11:48:07.805] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:07.823] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:08.527] INFO: Expecting 41600 events.
[11:48:11.826] INFO: 41600 events read in total (2773ms).
[11:48:11.827] INFO: Test took 4004ms.
[11:48:11.872] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:11.872] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318241
[11:48:11.872] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step2_C0 .. HR_xeff_CalDelScan_step2_C15
[11:48:11.872] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:11.898] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:12.585] INFO: Expecting 41600 events.
[11:48:15.824] INFO: 41600 events read in total (2712ms).
[11:48:15.825] INFO: Test took 3927ms.
[11:48:15.860] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:15.860] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 317874
[11:48:15.860] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step3_C0 .. HR_xeff_CalDelScan_step3_C15
[11:48:15.860] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:15.877] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:16.582] INFO: Expecting 41600 events.
[11:48:19.877] INFO: 41600 events read in total (2768ms).
[11:48:19.878] INFO: Test took 4001ms.
[11:48:19.912] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:19.912] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 319013
[11:48:19.912] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step4_C0 .. HR_xeff_CalDelScan_step4_C15
[11:48:19.912] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:19.929] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:20.627] INFO: Expecting 41600 events.
[11:48:23.856] INFO: 41600 events read in total (2703ms).
[11:48:23.857] INFO: Test took 3928ms.
[11:48:23.891] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:23.891] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 317446
[11:48:23.891] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step5_C0 .. HR_xeff_CalDelScan_step5_C15
[11:48:23.891] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:23.910] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:24.616] INFO: Expecting 41600 events.
[11:48:27.872] INFO: 41600 events read in total (2729ms).
[11:48:27.873] INFO: Test took 3963ms.
[11:48:27.908] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:27.908] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 319298
[11:48:27.908] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step6_C0 .. HR_xeff_CalDelScan_step6_C15
[11:48:27.909] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:27.926] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:28.627] INFO: Expecting 41600 events.
[11:48:31.899] INFO: 41600 events read in total (2745ms).
[11:48:31.900] INFO: Test took 3973ms.
[11:48:31.935] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:31.935] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 319398
[11:48:31.935] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step7_C0 .. HR_xeff_CalDelScan_step7_C15
[11:48:31.935] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:31.953] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:32.649] INFO: Expecting 41600 events.
[11:48:35.875] INFO: 41600 events read in total (2699ms).
[11:48:35.876] INFO: Test took 3923ms.
[11:48:35.911] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:35.911] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 317476
[11:48:35.911] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step8_C0 .. HR_xeff_CalDelScan_step8_C15
[11:48:35.911] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:35.929] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:36.629] INFO: Expecting 41600 events.
[11:48:39.839] INFO: 41600 events read in total (2683ms).
[11:48:39.839] INFO: Test took 3910ms.
[11:48:39.874] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:39.874] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318121
[11:48:39.874] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step9_C0 .. HR_xeff_CalDelScan_step9_C15
[11:48:39.874] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:39.892] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:40.597] INFO: Expecting 41600 events.
[11:48:43.902] INFO: 41600 events read in total (2778ms).
[11:48:43.903] INFO: Test took 4011ms.
[11:48:43.939] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:43.939] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 319349
[11:48:43.939] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step10_C0 .. HR_xeff_CalDelScan_step10_C15
[11:48:43.939] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:43.958] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:44.657] INFO: Expecting 41600 events.
[11:48:47.862] INFO: 41600 events read in total (2678ms).
[11:48:47.863] INFO: Test took 3905ms.
[11:48:47.898] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:47.898] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 317953
[11:48:47.898] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step11_C0 .. HR_xeff_CalDelScan_step11_C15
[11:48:47.898] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:47.916] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:48.617] INFO: Expecting 41600 events.
[11:48:51.809] INFO: 41600 events read in total (2665ms).
[11:48:51.810] INFO: Test took 3894ms.
[11:48:51.845] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:51.845] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318894
[11:48:51.845] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step12_C0 .. HR_xeff_CalDelScan_step12_C15
[11:48:51.845] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:51.862] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:52.563] INFO: Expecting 41600 events.
[11:48:55.835] INFO: 41600 events read in total (2745ms).
[11:48:55.836] INFO: Test took 3974ms.
[11:48:55.871] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:55.871] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318772
[11:48:55.871] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step13_C0 .. HR_xeff_CalDelScan_step13_C15
[11:48:55.871] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:55.890] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:48:56.596] INFO: Expecting 41600 events.
[11:48:59.857] INFO: 41600 events read in total (2735ms).
[11:48:59.858] INFO: Test took 3968ms.
[11:48:59.894] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:59.894] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318830
[11:48:59.894] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step14_C0 .. HR_xeff_CalDelScan_step14_C15
[11:48:59.894] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:48:59.912] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:49:00.608] INFO: Expecting 41600 events.
[11:49:03.759] INFO: 41600 events read in total (2624ms).
[11:49:03.760] INFO: Test took 3848ms.
[11:49:03.795] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:03.796] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318476
[11:49:03.796] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step15_C0 .. HR_xeff_CalDelScan_step15_C15
[11:49:03.796] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:49:03.813] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:49:04.510] INFO: Expecting 41600 events.
[11:49:07.734] INFO: 41600 events read in total (2697ms).
[11:49:07.735] INFO: Test took 3922ms.
[11:49:07.769] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:07.769] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 318253
[11:49:07.769] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step16_C0 .. HR_xeff_CalDelScan_step16_C15
[11:49:07.770] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:49:07.787] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:49:08.488] INFO: Expecting 41600 events.
[11:49:11.733] INFO: 41600 events read in total (2719ms).
[11:49:11.734] INFO: Test took 3947ms.
[11:49:11.769] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:11.769] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 319193
[11:49:11.769] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step17_C0 .. HR_xeff_CalDelScan_step17_C15
[11:49:11.770] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:49:11.787] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:49:12.490] INFO: Expecting 41600 events.
[11:49:15.655] INFO: 41600 events read in total (2639ms).
[11:49:15.656] INFO: Test took 3869ms.
[11:49:15.691] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:15.691] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 316967
[11:49:15.691] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step18_C0 .. HR_xeff_CalDelScan_step18_C15
[11:49:15.691] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:49:15.709] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:49:16.412] INFO: Expecting 41600 events.
[11:49:19.517] INFO: 41600 events read in total (2580ms).
[11:49:19.518] INFO: Test took 3809ms.
[11:49:19.552] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:19.552] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 308318
[11:49:19.552] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists HR_xeff_CalDelScan_step19_C0 .. HR_xeff_CalDelScan_step19_C15
[11:49:19.553] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:49:19.890] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 0: caldel = 156 eff = 0.999784
[11:49:19.890] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 1: caldel = 154 eff = 0.999856
[11:49:19.891] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 2: caldel = 154 eff = 0.999712
[11:49:19.891] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 3: caldel = 184 eff = 0.999495
[11:49:19.891] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 4: caldel = 143 eff = 0.999447
[11:49:19.891] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 5: caldel = 160 eff = 0.960986
[11:49:19.892] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 6: caldel = 151 eff = 0.999327
[11:49:19.892] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 7: caldel = 147 eff = 0.999639
[11:49:19.892] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 8: caldel = 154 eff = 0.999688
[11:49:19.892] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 9: caldel = 141 eff = 0.999543
[11:49:19.893] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 10: caldel = 174 eff = 0.999856
[11:49:19.893] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 11: caldel = 161 eff = 0.99976
[11:49:19.893] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 12: caldel = 148 eff = 0.999639
[11:49:19.893] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 13: caldel = 154 eff = 0.999856
[11:49:19.894] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 14: caldel = 163 eff = 0.999976
[11:49:19.894] DEBUG: <PixTestHighRate.cc/doCalDelScan:L435> roc 15: caldel = 170 eff = 0.999736
[11:49:19.898] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[11:49:19.919] INFO: enter test to run
[11:49:31.069] INFO: test: HighRate no parameter change
[11:49:31.069] INFO: running: highrate
[11:49:31.069] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[11:49:31.069] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[11:49:31.069] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[11:49:31.070] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: xpixelalive
[11:49:31.070] INFO: ----------------------------------------------------------------------
[11:49:31.070] INFO: PixTestHighRate::xPixelAlive() ntrig = 50, vcal = 200
[11:49:31.070] INFO: ----------------------------------------------------------------------
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: clk: 4
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: ctr: 4
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: sda: 19
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: tin: 9
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: level: 15
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: triggerdelay: 0
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: clk: 4
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: ctr: 4
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: sda: 19
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: tin: 9
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: level: 15
[11:49:31.071] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: triggerdelay: 20
[11:49:31.077] INFO: ROC 5 masking pixel 18/0
[11:49:31.077] INFO: ROC 5 masking pixel 18/1
[11:49:31.077] INFO: ROC 5 masking pixel 18/2
[11:49:31.077] INFO: ROC 5 masking pixel 18/3
[11:49:31.077] INFO: ROC 5 masking pixel 18/4
[11:49:31.077] INFO: ROC 5 masking pixel 18/5
[11:49:31.077] INFO: ROC 5 masking pixel 18/6
[11:49:31.077] INFO: ROC 5 masking pixel 18/7
[11:49:31.077] INFO: ROC 5 masking pixel 18/8
[11:49:31.077] INFO: ROC 5 masking pixel 18/9
[11:49:31.078] INFO: ROC 5 masking pixel 18/10
[11:49:31.078] INFO: ROC 5 masking pixel 18/11
[11:49:31.078] INFO: ROC 5 masking pixel 18/12
[11:49:31.078] INFO: ROC 5 masking pixel 18/13
[11:49:31.078] INFO: ROC 5 masking pixel 18/14
[11:49:31.078] INFO: ROC 5 masking pixel 18/15
[11:49:31.078] INFO: ROC 5 masking pixel 18/16
[11:49:31.078] INFO: ROC 5 masking pixel 18/17
[11:49:31.078] INFO: ROC 5 masking pixel 18/18
[11:49:31.078] INFO: ROC 5 masking pixel 18/19
[11:49:31.078] INFO: ROC 5 masking pixel 18/20
[11:49:31.078] INFO: ROC 5 masking pixel 18/21
[11:49:31.078] INFO: ROC 5 masking pixel 18/22
[11:49:31.078] INFO: ROC 5 masking pixel 18/23
[11:49:31.078] INFO: ROC 5 masking pixel 18/24
[11:49:31.078] INFO: ROC 5 masking pixel 18/25
[11:49:31.078] INFO: ROC 5 masking pixel 18/26
[11:49:31.078] INFO: ROC 5 masking pixel 18/27
[11:49:31.078] INFO: ROC 5 masking pixel 18/28
[11:49:31.078] INFO: ROC 5 masking pixel 18/29
[11:49:31.079] INFO: ROC 5 masking pixel 18/30
[11:49:31.079] INFO: ROC 5 masking pixel 18/31
[11:49:31.079] INFO: ROC 5 masking pixel 18/32
[11:49:31.079] INFO: ROC 5 masking pixel 18/33
[11:49:31.079] INFO: ROC 5 masking pixel 18/34
[11:49:31.079] INFO: ROC 5 masking pixel 18/35
[11:49:31.079] INFO: ROC 5 masking pixel 18/36
[11:49:31.079] INFO: ROC 5 masking pixel 18/37
[11:49:31.079] INFO: ROC 5 masking pixel 18/38
[11:49:31.079] INFO: ROC 5 masking pixel 18/39
[11:49:31.079] INFO: ROC 5 masking pixel 18/40
[11:49:31.079] INFO: ROC 5 masking pixel 18/41
[11:49:31.079] INFO: ROC 5 masking pixel 18/42
[11:49:31.079] INFO: ROC 5 masking pixel 18/43
[11:49:31.079] INFO: ROC 5 masking pixel 18/44
[11:49:31.079] INFO: ROC 5 masking pixel 18/45
[11:49:31.079] INFO: ROC 5 masking pixel 18/46
[11:49:31.079] INFO: ROC 5 masking pixel 18/47
[11:49:31.079] INFO: ROC 5 masking pixel 18/48
[11:49:31.079] INFO: ROC 5 masking pixel 18/49
[11:49:31.079] INFO: ROC 5 masking pixel 18/50
[11:49:31.080] INFO: ROC 5 masking pixel 18/51
[11:49:31.080] INFO: ROC 5 masking pixel 18/52
[11:49:31.080] INFO: ROC 5 masking pixel 18/53
[11:49:31.080] INFO: ROC 5 masking pixel 18/54
[11:49:31.080] INFO: ROC 5 masking pixel 18/55
[11:49:31.080] INFO: ROC 5 masking pixel 18/56
[11:49:31.080] INFO: ROC 5 masking pixel 18/57
[11:49:31.080] INFO: ROC 5 masking pixel 18/58
[11:49:31.080] INFO: ROC 5 masking pixel 18/59
[11:49:31.080] INFO: ROC 5 masking pixel 18/60
[11:49:31.080] INFO: ROC 5 masking pixel 18/61
[11:49:31.080] INFO: ROC 5 masking pixel 18/62
[11:49:31.080] INFO: ROC 5 masking pixel 18/63
[11:49:31.080] INFO: ROC 5 masking pixel 18/64
[11:49:31.080] INFO: ROC 5 masking pixel 18/65
[11:49:31.080] INFO: ROC 5 masking pixel 18/66
[11:49:31.080] INFO: ROC 5 masking pixel 18/67
[11:49:31.080] INFO: ROC 5 masking pixel 18/68
[11:49:31.080] INFO: ROC 5 masking pixel 18/69
[11:49:31.080] INFO: ROC 5 masking pixel 18/70
[11:49:31.080] INFO: ROC 5 masking pixel 18/71
[11:49:31.080] INFO: ROC 5 masking pixel 18/72
[11:49:31.080] INFO: ROC 5 masking pixel 18/73
[11:49:31.081] INFO: ROC 5 masking pixel 18/74
[11:49:31.081] INFO: ROC 5 masking pixel 18/75
[11:49:31.081] INFO: ROC 5 masking pixel 18/76
[11:49:31.081] INFO: ROC 5 masking pixel 18/77
[11:49:31.081] INFO: ROC 5 masking pixel 18/78
[11:49:31.081] INFO: ROC 5 masking pixel 18/79
[11:49:31.081] INFO: ROC 5 masking pixel 19/0
[11:49:31.081] INFO: ROC 5 masking pixel 19/1
[11:49:31.081] INFO: ROC 5 masking pixel 19/2
[11:49:31.081] INFO: ROC 5 masking pixel 19/3
[11:49:31.081] INFO: ROC 5 masking pixel 19/4
[11:49:31.081] INFO: ROC 5 masking pixel 19/5
[11:49:31.081] INFO: ROC 5 masking pixel 19/6
[11:49:31.081] INFO: ROC 5 masking pixel 19/7
[11:49:31.081] INFO: ROC 5 masking pixel 19/8
[11:49:31.081] INFO: ROC 5 masking pixel 19/9
[11:49:31.081] INFO: ROC 5 masking pixel 19/10
[11:49:31.081] INFO: ROC 5 masking pixel 19/11
[11:49:31.081] INFO: ROC 5 masking pixel 19/12
[11:49:31.081] INFO: ROC 5 masking pixel 19/13
[11:49:31.081] INFO: ROC 5 masking pixel 19/14
[11:49:31.081] INFO: ROC 5 masking pixel 19/15
[11:49:31.081] INFO: ROC 5 masking pixel 19/16
[11:49:31.082] INFO: ROC 5 masking pixel 19/17
[11:49:31.082] INFO: ROC 5 masking pixel 19/18
[11:49:31.082] INFO: ROC 5 masking pixel 19/19
[11:49:31.082] INFO: ROC 5 masking pixel 19/20
[11:49:31.082] INFO: ROC 5 masking pixel 19/21
[11:49:31.082] INFO: ROC 5 masking pixel 19/22
[11:49:31.082] INFO: ROC 5 masking pixel 19/23
[11:49:31.082] INFO: ROC 5 masking pixel 19/24
[11:49:31.082] INFO: ROC 5 masking pixel 19/25
[11:49:31.082] INFO: ROC 5 masking pixel 19/26
[11:49:31.082] INFO: ROC 5 masking pixel 19/27
[11:49:31.082] INFO: ROC 5 masking pixel 19/28
[11:49:31.082] INFO: ROC 5 masking pixel 19/29
[11:49:31.082] INFO: ROC 5 masking pixel 19/30
[11:49:31.082] INFO: ROC 5 masking pixel 19/31
[11:49:31.082] INFO: ROC 5 masking pixel 19/32
[11:49:31.082] INFO: ROC 5 masking pixel 19/33
[11:49:31.082] INFO: ROC 5 masking pixel 19/34
[11:49:31.082] INFO: ROC 5 masking pixel 19/35
[11:49:31.082] INFO: ROC 5 masking pixel 19/36
[11:49:31.082] INFO: ROC 5 masking pixel 19/37
[11:49:31.082] INFO: ROC 5 masking pixel 19/38
[11:49:31.082] INFO: ROC 5 masking pixel 19/39
[11:49:31.082] INFO: ROC 5 masking pixel 19/40
[11:49:31.082] INFO: ROC 5 masking pixel 19/41
[11:49:31.082] INFO: ROC 5 masking pixel 19/42
[11:49:31.082] INFO: ROC 5 masking pixel 19/43
[11:49:31.082] INFO: ROC 5 masking pixel 19/44
[11:49:31.082] INFO: ROC 5 masking pixel 19/45
[11:49:31.082] INFO: ROC 5 masking pixel 19/46
[11:49:31.082] INFO: ROC 5 masking pixel 19/47
[11:49:31.082] INFO: ROC 5 masking pixel 19/48
[11:49:31.082] INFO: ROC 5 masking pixel 19/49
[11:49:31.082] INFO: ROC 5 masking pixel 19/50
[11:49:31.082] INFO: ROC 5 masking pixel 19/51
[11:49:31.082] INFO: ROC 5 masking pixel 19/52
[11:49:31.083] INFO: ROC 5 masking pixel 19/53
[11:49:31.083] INFO: ROC 5 masking pixel 19/54
[11:49:31.083] INFO: ROC 5 masking pixel 19/55
[11:49:31.083] INFO: ROC 5 masking pixel 19/56
[11:49:31.083] INFO: ROC 5 masking pixel 19/57
[11:49:31.083] INFO: ROC 5 masking pixel 19/58
[11:49:31.083] INFO: ROC 5 masking pixel 19/59
[11:49:31.083] INFO: ROC 5 masking pixel 19/60
[11:49:31.083] INFO: ROC 5 masking pixel 19/61
[11:49:31.083] INFO: ROC 5 masking pixel 19/62
[11:49:31.083] INFO: ROC 5 masking pixel 19/63
[11:49:31.083] INFO: ROC 5 masking pixel 19/64
[11:49:31.083] INFO: ROC 5 masking pixel 19/65
[11:49:31.083] INFO: ROC 5 masking pixel 19/66
[11:49:31.083] INFO: ROC 5 masking pixel 19/67
[11:49:31.083] INFO: ROC 5 masking pixel 19/68
[11:49:31.083] INFO: ROC 5 masking pixel 19/69
[11:49:31.083] INFO: ROC 5 masking pixel 19/70
[11:49:31.083] INFO: ROC 5 masking pixel 19/71
[11:49:31.083] INFO: ROC 5 masking pixel 19/72
[11:49:31.083] INFO: ROC 5 masking pixel 19/73
[11:49:31.083] INFO: ROC 5 masking pixel 19/74
[11:49:31.083] INFO: ROC 5 masking pixel 19/75
[11:49:31.083] INFO: ROC 5 masking pixel 19/76
[11:49:31.083] INFO: ROC 5 masking pixel 19/77
[11:49:31.083] INFO: ROC 5 masking pixel 19/78
[11:49:31.083] INFO: ROC 5 masking pixel 19/79
[11:49:31.084] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:49:31.699] INFO: Expecting 208000 events.
[11:49:43.448] INFO: 208000 events read in total (11223ms).
[11:49:43.451] INFO: Test took 12367ms.
[11:49:43.601] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:43.601] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 1320521
[11:49:43.601] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists highRate_C0 .. highRate_C15
[11:49:43.601] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:49:43.853] INFO: number of dead pixels (per ROC): 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 1
[11:49:43.853] INFO: number of red-efficiency pixels: 79 58 74 109 177 316 143 135 99 121 96 67 89 50 20 15
[11:49:43.853] INFO: number of X-ray hits detected: 66134 46675 66700 100122 111152 116859 123024 93860 89294 95835 94539 77738 80750 50477 20956 20007
[11:49:43.853] INFO: number of triggers sent (total per ROC): 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000
[11:49:43.853] INFO: number of Vcal hits detected: 207921 207941 207925 207882 207816 199840 207856 207862 207896 207874 207903 207930 207905 207950 207980 207936
[11:49:43.853] INFO: Vcal hit fiducial efficiency (%): 100.0 100.0 100.0 99.9 99.9 99.9 99.9 99.9 100.0 99.9 100.0 100.0 100.0 100.0 100.0 100.0
[11:49:43.853] INFO: Vcal hit overall efficiency (%): 100.0 100.0 100.0 99.9 99.9 96.1 99.9 99.9 100.0 99.9 100.0 100.0 100.0 100.0 100.0 100.0
[11:49:43.853] INFO: X-ray hit rate [MHz/cm2]: 19.4 13.7 19.6 29.3 32.6 34.3 36.1 27.5 26.2 28.1 27.7 22.8 23.7 14.8 6.1 5.9
[11:49:43.853] INFO: PixTestHighRate::doXPixelAlive() done
[11:49:43.901] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: clk: 4
[11:49:43.901] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: ctr: 4
[11:49:43.901] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: sda: 19
[11:49:43.901] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: tin: 9
[11:49:43.901] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: level: 15
[11:49:43.901] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: triggerdelay: 0
[11:49:43.902] INFO: PixTest:: pg_setup set to default.
[11:49:43.902] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[11:49:43.912] INFO: enter test to run
[11:50:02.573] INFO: test: HighRate no parameter change
[11:50:02.573] INFO: running: highrate
[11:50:02.573] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[11:50:02.573] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[11:50:02.573] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[11:50:02.574] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: xpixelalive
[11:50:02.574] INFO: ----------------------------------------------------------------------
[11:50:02.574] INFO: PixTestHighRate::xPixelAlive() ntrig = 50, vcal = 200
[11:50:02.574] INFO: ----------------------------------------------------------------------
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: clk: 4
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: ctr: 4
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: sda: 19
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: tin: 9
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: level: 15
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: triggerdelay: 0
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: clk: 4
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: ctr: 4
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: sda: 19
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: tin: 9
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: level: 15
[11:50:02.575] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: triggerdelay: 20
[11:50:02.581] INFO: ROC 5 masking pixel 18/0
[11:50:02.581] INFO: ROC 5 masking pixel 18/1
[11:50:02.581] INFO: ROC 5 masking pixel 18/2
[11:50:02.581] INFO: ROC 5 masking pixel 18/3
[11:50:02.581] INFO: ROC 5 masking pixel 18/4
[11:50:02.581] INFO: ROC 5 masking pixel 18/5
[11:50:02.581] INFO: ROC 5 masking pixel 18/6
[11:50:02.581] INFO: ROC 5 masking pixel 18/7
[11:50:02.581] INFO: ROC 5 masking pixel 18/8
[11:50:02.581] INFO: ROC 5 masking pixel 18/9
[11:50:02.581] INFO: ROC 5 masking pixel 18/10
[11:50:02.581] INFO: ROC 5 masking pixel 18/11
[11:50:02.581] INFO: ROC 5 masking pixel 18/12
[11:50:02.581] INFO: ROC 5 masking pixel 18/13
[11:50:02.581] INFO: ROC 5 masking pixel 18/14
[11:50:02.581] INFO: ROC 5 masking pixel 18/15
[11:50:02.581] INFO: ROC 5 masking pixel 18/16
[11:50:02.581] INFO: ROC 5 masking pixel 18/17
[11:50:02.581] INFO: ROC 5 masking pixel 18/18
[11:50:02.581] INFO: ROC 5 masking pixel 18/19
[11:50:02.581] INFO: ROC 5 masking pixel 18/20
[11:50:02.581] INFO: ROC 5 masking pixel 18/21
[11:50:02.581] INFO: ROC 5 masking pixel 18/22
[11:50:02.581] INFO: ROC 5 masking pixel 18/23
[11:50:02.581] INFO: ROC 5 masking pixel 18/24
[11:50:02.581] INFO: ROC 5 masking pixel 18/25
[11:50:02.581] INFO: ROC 5 masking pixel 18/26
[11:50:02.581] INFO: ROC 5 masking pixel 18/27
[11:50:02.581] INFO: ROC 5 masking pixel 18/28
[11:50:02.581] INFO: ROC 5 masking pixel 18/29
[11:50:02.581] INFO: ROC 5 masking pixel 18/30
[11:50:02.581] INFO: ROC 5 masking pixel 18/31
[11:50:02.581] INFO: ROC 5 masking pixel 18/32
[11:50:02.581] INFO: ROC 5 masking pixel 18/33
[11:50:02.581] INFO: ROC 5 masking pixel 18/34
[11:50:02.581] INFO: ROC 5 masking pixel 18/35
[11:50:02.581] INFO: ROC 5 masking pixel 18/36
[11:50:02.582] INFO: ROC 5 masking pixel 18/37
[11:50:02.582] INFO: ROC 5 masking pixel 18/38
[11:50:02.582] INFO: ROC 5 masking pixel 18/39
[11:50:02.582] INFO: ROC 5 masking pixel 18/40
[11:50:02.582] INFO: ROC 5 masking pixel 18/41
[11:50:02.582] INFO: ROC 5 masking pixel 18/42
[11:50:02.582] INFO: ROC 5 masking pixel 18/43
[11:50:02.582] INFO: ROC 5 masking pixel 18/44
[11:50:02.582] INFO: ROC 5 masking pixel 18/45
[11:50:02.582] INFO: ROC 5 masking pixel 18/46
[11:50:02.582] INFO: ROC 5 masking pixel 18/47
[11:50:02.582] INFO: ROC 5 masking pixel 18/48
[11:50:02.582] INFO: ROC 5 masking pixel 18/49
[11:50:02.582] INFO: ROC 5 masking pixel 18/50
[11:50:02.582] INFO: ROC 5 masking pixel 18/51
[11:50:02.582] INFO: ROC 5 masking pixel 18/52
[11:50:02.582] INFO: ROC 5 masking pixel 18/53
[11:50:02.582] INFO: ROC 5 masking pixel 18/54
[11:50:02.582] INFO: ROC 5 masking pixel 18/55
[11:50:02.582] INFO: ROC 5 masking pixel 18/56
[11:50:02.582] INFO: ROC 5 masking pixel 18/57
[11:50:02.582] INFO: ROC 5 masking pixel 18/58
[11:50:02.582] INFO: ROC 5 masking pixel 18/59
[11:50:02.582] INFO: ROC 5 masking pixel 18/60
[11:50:02.582] INFO: ROC 5 masking pixel 18/61
[11:50:02.582] INFO: ROC 5 masking pixel 18/62
[11:50:02.582] INFO: ROC 5 masking pixel 18/63
[11:50:02.582] INFO: ROC 5 masking pixel 18/64
[11:50:02.582] INFO: ROC 5 masking pixel 18/65
[11:50:02.582] INFO: ROC 5 masking pixel 18/66
[11:50:02.582] INFO: ROC 5 masking pixel 18/67
[11:50:02.582] INFO: ROC 5 masking pixel 18/68
[11:50:02.582] INFO: ROC 5 masking pixel 18/69
[11:50:02.582] INFO: ROC 5 masking pixel 18/70
[11:50:02.582] INFO: ROC 5 masking pixel 18/71
[11:50:02.582] INFO: ROC 5 masking pixel 18/72
[11:50:02.582] INFO: ROC 5 masking pixel 18/73
[11:50:02.582] INFO: ROC 5 masking pixel 18/74
[11:50:02.582] INFO: ROC 5 masking pixel 18/75
[11:50:02.582] INFO: ROC 5 masking pixel 18/76
[11:50:02.582] INFO: ROC 5 masking pixel 18/77
[11:50:02.582] INFO: ROC 5 masking pixel 18/78
[11:50:02.582] INFO: ROC 5 masking pixel 18/79
[11:50:02.582] INFO: ROC 5 masking pixel 19/0
[11:50:02.582] INFO: ROC 5 masking pixel 19/1
[11:50:02.582] INFO: ROC 5 masking pixel 19/2
[11:50:02.582] INFO: ROC 5 masking pixel 19/3
[11:50:02.582] INFO: ROC 5 masking pixel 19/4
[11:50:02.582] INFO: ROC 5 masking pixel 19/5
[11:50:02.582] INFO: ROC 5 masking pixel 19/6
[11:50:02.582] INFO: ROC 5 masking pixel 19/7
[11:50:02.582] INFO: ROC 5 masking pixel 19/8
[11:50:02.582] INFO: ROC 5 masking pixel 19/9
[11:50:02.582] INFO: ROC 5 masking pixel 19/10
[11:50:02.582] INFO: ROC 5 masking pixel 19/11
[11:50:02.582] INFO: ROC 5 masking pixel 19/12
[11:50:02.582] INFO: ROC 5 masking pixel 19/13
[11:50:02.582] INFO: ROC 5 masking pixel 19/14
[11:50:02.582] INFO: ROC 5 masking pixel 19/15
[11:50:02.582] INFO: ROC 5 masking pixel 19/16
[11:50:02.582] INFO: ROC 5 masking pixel 19/17
[11:50:02.582] INFO: ROC 5 masking pixel 19/18
[11:50:02.582] INFO: ROC 5 masking pixel 19/19
[11:50:02.582] INFO: ROC 5 masking pixel 19/20
[11:50:02.582] INFO: ROC 5 masking pixel 19/21
[11:50:02.582] INFO: ROC 5 masking pixel 19/22
[11:50:02.582] INFO: ROC 5 masking pixel 19/23
[11:50:02.582] INFO: ROC 5 masking pixel 19/24
[11:50:02.582] INFO: ROC 5 masking pixel 19/25
[11:50:02.582] INFO: ROC 5 masking pixel 19/26
[11:50:02.582] INFO: ROC 5 masking pixel 19/27
[11:50:02.582] INFO: ROC 5 masking pixel 19/28
[11:50:02.582] INFO: ROC 5 masking pixel 19/29
[11:50:02.582] INFO: ROC 5 masking pixel 19/30
[11:50:02.582] INFO: ROC 5 masking pixel 19/31
[11:50:02.582] INFO: ROC 5 masking pixel 19/32
[11:50:02.582] INFO: ROC 5 masking pixel 19/33
[11:50:02.582] INFO: ROC 5 masking pixel 19/34
[11:50:02.582] INFO: ROC 5 masking pixel 19/35
[11:50:02.582] INFO: ROC 5 masking pixel 19/36
[11:50:02.582] INFO: ROC 5 masking pixel 19/37
[11:50:02.582] INFO: ROC 5 masking pixel 19/38
[11:50:02.582] INFO: ROC 5 masking pixel 19/39
[11:50:02.583] INFO: ROC 5 masking pixel 19/40
[11:50:02.583] INFO: ROC 5 masking pixel 19/41
[11:50:02.583] INFO: ROC 5 masking pixel 19/42
[11:50:02.583] INFO: ROC 5 masking pixel 19/43
[11:50:02.583] INFO: ROC 5 masking pixel 19/44
[11:50:02.583] INFO: ROC 5 masking pixel 19/45
[11:50:02.583] INFO: ROC 5 masking pixel 19/46
[11:50:02.583] INFO: ROC 5 masking pixel 19/47
[11:50:02.583] INFO: ROC 5 masking pixel 19/48
[11:50:02.583] INFO: ROC 5 masking pixel 19/49
[11:50:02.583] INFO: ROC 5 masking pixel 19/50
[11:50:02.583] INFO: ROC 5 masking pixel 19/51
[11:50:02.583] INFO: ROC 5 masking pixel 19/52
[11:50:02.583] INFO: ROC 5 masking pixel 19/53
[11:50:02.583] INFO: ROC 5 masking pixel 19/54
[11:50:02.583] INFO: ROC 5 masking pixel 19/55
[11:50:02.583] INFO: ROC 5 masking pixel 19/56
[11:50:02.583] INFO: ROC 5 masking pixel 19/57
[11:50:02.583] INFO: ROC 5 masking pixel 19/58
[11:50:02.583] INFO: ROC 5 masking pixel 19/59
[11:50:02.583] INFO: ROC 5 masking pixel 19/60
[11:50:02.583] INFO: ROC 5 masking pixel 19/61
[11:50:02.583] INFO: ROC 5 masking pixel 19/62
[11:50:02.583] INFO: ROC 5 masking pixel 19/63
[11:50:02.583] INFO: ROC 5 masking pixel 19/64
[11:50:02.583] INFO: ROC 5 masking pixel 19/65
[11:50:02.583] INFO: ROC 5 masking pixel 19/66
[11:50:02.583] INFO: ROC 5 masking pixel 19/67
[11:50:02.583] INFO: ROC 5 masking pixel 19/68
[11:50:02.583] INFO: ROC 5 masking pixel 19/69
[11:50:02.583] INFO: ROC 5 masking pixel 19/70
[11:50:02.583] INFO: ROC 5 masking pixel 19/71
[11:50:02.583] INFO: ROC 5 masking pixel 19/72
[11:50:02.583] INFO: ROC 5 masking pixel 19/73
[11:50:02.583] INFO: ROC 5 masking pixel 19/74
[11:50:02.583] INFO: ROC 5 masking pixel 19/75
[11:50:02.583] INFO: ROC 5 masking pixel 19/76
[11:50:02.583] INFO: ROC 5 masking pixel 19/77
[11:50:02.583] INFO: ROC 5 masking pixel 19/78
[11:50:02.583] INFO: ROC 5 masking pixel 19/79
[11:50:02.583] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:50:03.187] INFO: Expecting 208000 events.
[11:50:16.670] INFO: 208000 events read in total (12956ms).
[11:50:16.676] INFO: Test took 14093ms.
[11:50:16.981] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:16.981] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 2722448
[11:50:16.981] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists highRate_C0 .. highRate_C15
[11:50:16.981] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:50:17.288] INFO: number of dead pixels (per ROC): 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 1
[11:50:17.288] INFO: number of red-efficiency pixels: 171 137 231 349 536 754 497 402 267 424 271 224 217 137 52 49
[11:50:17.288] INFO: number of X-ray hits detected: 140579 98533 142153 211399 235398 246528 259956 198499 188335 203273 200238 164651 171752 107334 44793 42628
[11:50:17.288] INFO: number of triggers sent (total per ROC): 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000
[11:50:17.288] INFO: number of Vcal hits detected: 207821 207855 207754 207617 207396 199335 207462 207566 207721 207539 207720 207765 207767 207855 207947 207902
[11:50:17.288] INFO: Vcal hit fiducial efficiency (%): 99.9 99.9 99.9 99.8 99.7 99.7 99.8 99.8 99.9 99.8 99.9 99.9 99.9 99.9 100.0 100.0
[11:50:17.288] INFO: Vcal hit overall efficiency (%): 99.9 99.9 99.9 99.8 99.7 95.8 99.7 99.8 99.9 99.8 99.9 99.9 99.9 99.9 100.0 100.0
[11:50:17.288] INFO: X-ray hit rate [MHz/cm2]: 41.2 28.9 41.7 62.0 69.0 72.3 76.2 58.2 55.2 59.6 58.7 48.3 50.3 31.5 13.1 12.5
[11:50:17.288] INFO: PixTestHighRate::doXPixelAlive() done
[11:50:17.333] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: clk: 4
[11:50:17.333] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: ctr: 4
[11:50:17.333] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: sda: 19
[11:50:17.333] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: tin: 9
[11:50:17.333] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: level: 15
[11:50:17.333] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: triggerdelay: 0
[11:50:17.333] INFO: PixTest:: pg_setup set to default.
[11:50:17.333] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[11:50:17.343] INFO: enter test to run
[11:50:44.173] INFO: test: HighRate no parameter change
[11:50:44.173] INFO: running: highrate
[11:50:44.173] DEBUG: <PixTestHighRate.cc/setParameter:L68> setting fParTriggerFrequency -> 20
[11:50:44.173] DEBUG: <PixTestHighRate.cc/init:L211> PixTestHighRate::init()
[11:50:44.173] DEBUG: <PixTestHighRate.cc/PixTestHighRate:L31> PixTestHighRate ctor(PixSetup &a, string, TGTab *)
[11:50:44.174] DEBUG: <PixTestHighRate.cc/runCommand:L165> running command: xpixelalive
[11:50:44.174] INFO: ----------------------------------------------------------------------
[11:50:44.174] INFO: PixTestHighRate::xPixelAlive() ntrig = 50, vcal = 200
[11:50:44.174] INFO: ----------------------------------------------------------------------
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: clk: 4
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: ctr: 4
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: sda: 19
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: tin: 9
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: level: 15
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L464> old set: triggerdelay: 0
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: clk: 4
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: ctr: 4
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: sda: 19
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: tin: 9
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: level: 15
[11:50:44.175] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L480> setting: triggerdelay: 20
[11:50:44.182] INFO: ROC 5 masking pixel 18/0
[11:50:44.182] INFO: ROC 5 masking pixel 18/1
[11:50:44.182] INFO: ROC 5 masking pixel 18/2
[11:50:44.182] INFO: ROC 5 masking pixel 18/3
[11:50:44.182] INFO: ROC 5 masking pixel 18/4
[11:50:44.183] INFO: ROC 5 masking pixel 18/5
[11:50:44.183] INFO: ROC 5 masking pixel 18/6
[11:50:44.183] INFO: ROC 5 masking pixel 18/7
[11:50:44.183] INFO: ROC 5 masking pixel 18/8
[11:50:44.183] INFO: ROC 5 masking pixel 18/9
[11:50:44.183] INFO: ROC 5 masking pixel 18/10
[11:50:44.183] INFO: ROC 5 masking pixel 18/11
[11:50:44.183] INFO: ROC 5 masking pixel 18/12
[11:50:44.183] INFO: ROC 5 masking pixel 18/13
[11:50:44.183] INFO: ROC 5 masking pixel 18/14
[11:50:44.183] INFO: ROC 5 masking pixel 18/15
[11:50:44.183] INFO: ROC 5 masking pixel 18/16
[11:50:44.183] INFO: ROC 5 masking pixel 18/17
[11:50:44.183] INFO: ROC 5 masking pixel 18/18
[11:50:44.183] INFO: ROC 5 masking pixel 18/19
[11:50:44.183] INFO: ROC 5 masking pixel 18/20
[11:50:44.183] INFO: ROC 5 masking pixel 18/21
[11:50:44.183] INFO: ROC 5 masking pixel 18/22
[11:50:44.183] INFO: ROC 5 masking pixel 18/23
[11:50:44.183] INFO: ROC 5 masking pixel 18/24
[11:50:44.183] INFO: ROC 5 masking pixel 18/25
[11:50:44.183] INFO: ROC 5 masking pixel 18/26
[11:50:44.183] INFO: ROC 5 masking pixel 18/27
[11:50:44.184] INFO: ROC 5 masking pixel 18/28
[11:50:44.184] INFO: ROC 5 masking pixel 18/29
[11:50:44.184] INFO: ROC 5 masking pixel 18/30
[11:50:44.184] INFO: ROC 5 masking pixel 18/31
[11:50:44.184] INFO: ROC 5 masking pixel 18/32
[11:50:44.184] INFO: ROC 5 masking pixel 18/33
[11:50:44.184] INFO: ROC 5 masking pixel 18/34
[11:50:44.184] INFO: ROC 5 masking pixel 18/35
[11:50:44.184] INFO: ROC 5 masking pixel 18/36
[11:50:44.184] INFO: ROC 5 masking pixel 18/37
[11:50:44.184] INFO: ROC 5 masking pixel 18/38
[11:50:44.184] INFO: ROC 5 masking pixel 18/39
[11:50:44.184] INFO: ROC 5 masking pixel 18/40
[11:50:44.184] INFO: ROC 5 masking pixel 18/41
[11:50:44.184] INFO: ROC 5 masking pixel 18/42
[11:50:44.184] INFO: ROC 5 masking pixel 18/43
[11:50:44.184] INFO: ROC 5 masking pixel 18/44
[11:50:44.184] INFO: ROC 5 masking pixel 18/45
[11:50:44.184] INFO: ROC 5 masking pixel 18/46
[11:50:44.184] INFO: ROC 5 masking pixel 18/47
[11:50:44.184] INFO: ROC 5 masking pixel 18/48
[11:50:44.184] INFO: ROC 5 masking pixel 18/49
[11:50:44.184] INFO: ROC 5 masking pixel 18/50
[11:50:44.185] INFO: ROC 5 masking pixel 18/51
[11:50:44.185] INFO: ROC 5 masking pixel 18/52
[11:50:44.185] INFO: ROC 5 masking pixel 18/53
[11:50:44.185] INFO: ROC 5 masking pixel 18/54
[11:50:44.185] INFO: ROC 5 masking pixel 18/55
[11:50:44.185] INFO: ROC 5 masking pixel 18/56
[11:50:44.185] INFO: ROC 5 masking pixel 18/57
[11:50:44.185] INFO: ROC 5 masking pixel 18/58
[11:50:44.185] INFO: ROC 5 masking pixel 18/59
[11:50:44.185] INFO: ROC 5 masking pixel 18/60
[11:50:44.185] INFO: ROC 5 masking pixel 18/61
[11:50:44.185] INFO: ROC 5 masking pixel 18/62
[11:50:44.185] INFO: ROC 5 masking pixel 18/63
[11:50:44.185] INFO: ROC 5 masking pixel 18/64
[11:50:44.185] INFO: ROC 5 masking pixel 18/65
[11:50:44.185] INFO: ROC 5 masking pixel 18/66
[11:50:44.185] INFO: ROC 5 masking pixel 18/67
[11:50:44.185] INFO: ROC 5 masking pixel 18/68
[11:50:44.185] INFO: ROC 5 masking pixel 18/69
[11:50:44.185] INFO: ROC 5 masking pixel 18/70
[11:50:44.185] INFO: ROC 5 masking pixel 18/71
[11:50:44.186] INFO: ROC 5 masking pixel 18/72
[11:50:44.186] INFO: ROC 5 masking pixel 18/73
[11:50:44.186] INFO: ROC 5 masking pixel 18/74
[11:50:44.186] INFO: ROC 5 masking pixel 18/75
[11:50:44.186] INFO: ROC 5 masking pixel 18/76
[11:50:44.186] INFO: ROC 5 masking pixel 18/77
[11:50:44.186] INFO: ROC 5 masking pixel 18/78
[11:50:44.186] INFO: ROC 5 masking pixel 18/79
[11:50:44.186] INFO: ROC 5 masking pixel 19/0
[11:50:44.186] INFO: ROC 5 masking pixel 19/1
[11:50:44.186] INFO: ROC 5 masking pixel 19/2
[11:50:44.186] INFO: ROC 5 masking pixel 19/3
[11:50:44.186] INFO: ROC 5 masking pixel 19/4
[11:50:44.186] INFO: ROC 5 masking pixel 19/5
[11:50:44.186] INFO: ROC 5 masking pixel 19/6
[11:50:44.186] INFO: ROC 5 masking pixel 19/7
[11:50:44.186] INFO: ROC 5 masking pixel 19/8
[11:50:44.186] INFO: ROC 5 masking pixel 19/9
[11:50:44.186] INFO: ROC 5 masking pixel 19/10
[11:50:44.186] INFO: ROC 5 masking pixel 19/11
[11:50:44.186] INFO: ROC 5 masking pixel 19/12
[11:50:44.187] INFO: ROC 5 masking pixel 19/13
[11:50:44.187] INFO: ROC 5 masking pixel 19/14
[11:50:44.187] INFO: ROC 5 masking pixel 19/15
[11:50:44.187] INFO: ROC 5 masking pixel 19/16
[11:50:44.187] INFO: ROC 5 masking pixel 19/17
[11:50:44.187] INFO: ROC 5 masking pixel 19/18
[11:50:44.187] INFO: ROC 5 masking pixel 19/19
[11:50:44.187] INFO: ROC 5 masking pixel 19/20
[11:50:44.187] INFO: ROC 5 masking pixel 19/21
[11:50:44.187] INFO: ROC 5 masking pixel 19/22
[11:50:44.187] INFO: ROC 5 masking pixel 19/23
[11:50:44.187] INFO: ROC 5 masking pixel 19/24
[11:50:44.187] INFO: ROC 5 masking pixel 19/25
[11:50:44.187] INFO: ROC 5 masking pixel 19/26
[11:50:44.187] INFO: ROC 5 masking pixel 19/27
[11:50:44.187] INFO: ROC 5 masking pixel 19/28
[11:50:44.187] INFO: ROC 5 masking pixel 19/29
[11:50:44.187] INFO: ROC 5 masking pixel 19/30
[11:50:44.187] INFO: ROC 5 masking pixel 19/31
[11:50:44.187] INFO: ROC 5 masking pixel 19/32
[11:50:44.187] INFO: ROC 5 masking pixel 19/33
[11:50:44.187] INFO: ROC 5 masking pixel 19/34
[11:50:44.187] INFO: ROC 5 masking pixel 19/35
[11:50:44.188] INFO: ROC 5 masking pixel 19/36
[11:50:44.188] INFO: ROC 5 masking pixel 19/37
[11:50:44.188] INFO: ROC 5 masking pixel 19/38
[11:50:44.188] INFO: ROC 5 masking pixel 19/39
[11:50:44.188] INFO: ROC 5 masking pixel 19/40
[11:50:44.188] INFO: ROC 5 masking pixel 19/41
[11:50:44.188] INFO: ROC 5 masking pixel 19/42
[11:50:44.188] INFO: ROC 5 masking pixel 19/43
[11:50:44.188] INFO: ROC 5 masking pixel 19/44
[11:50:44.188] INFO: ROC 5 masking pixel 19/45
[11:50:44.188] INFO: ROC 5 masking pixel 19/46
[11:50:44.188] INFO: ROC 5 masking pixel 19/47
[11:50:44.188] INFO: ROC 5 masking pixel 19/48
[11:50:44.188] INFO: ROC 5 masking pixel 19/49
[11:50:44.188] INFO: ROC 5 masking pixel 19/50
[11:50:44.188] INFO: ROC 5 masking pixel 19/51
[11:50:44.188] INFO: ROC 5 masking pixel 19/52
[11:50:44.188] INFO: ROC 5 masking pixel 19/53
[11:50:44.188] INFO: ROC 5 masking pixel 19/54
[11:50:44.188] INFO: ROC 5 masking pixel 19/55
[11:50:44.188] INFO: ROC 5 masking pixel 19/56
[11:50:44.188] INFO: ROC 5 masking pixel 19/57
[11:50:44.188] INFO: ROC 5 masking pixel 19/58
[11:50:44.189] INFO: ROC 5 masking pixel 19/59
[11:50:44.189] INFO: ROC 5 masking pixel 19/60
[11:50:44.189] INFO: ROC 5 masking pixel 19/61
[11:50:44.189] INFO: ROC 5 masking pixel 19/62
[11:50:44.189] INFO: ROC 5 masking pixel 19/63
[11:50:44.189] INFO: ROC 5 masking pixel 19/64
[11:50:44.189] INFO: ROC 5 masking pixel 19/65
[11:50:44.189] INFO: ROC 5 masking pixel 19/66
[11:50:44.189] INFO: ROC 5 masking pixel 19/67
[11:50:44.189] INFO: ROC 5 masking pixel 19/68
[11:50:44.189] INFO: ROC 5 masking pixel 19/69
[11:50:44.189] INFO: ROC 5 masking pixel 19/70
[11:50:44.189] INFO: ROC 5 masking pixel 19/71
[11:50:44.189] INFO: ROC 5 masking pixel 19/72
[11:50:44.189] INFO: ROC 5 masking pixel 19/73
[11:50:44.189] INFO: ROC 5 masking pixel 19/74
[11:50:44.189] INFO: ROC 5 masking pixel 19/75
[11:50:44.189] INFO: ROC 5 masking pixel 19/76
[11:50:44.189] INFO: ROC 5 masking pixel 19/77
[11:50:44.189] INFO: ROC 5 masking pixel 19/78
[11:50:44.189] INFO: ROC 5 masking pixel 19/79
[11:50:44.190] DEBUG: <PixTest.cc/efficiencyMaps:L396> attempt #0
[11:50:44.818] INFO: Expecting 208000 events.
[11:51:00.694] INFO: 208000 events read in total (15349ms).
[11:51:00.701] INFO: Test took 16511ms.
[11:51:01.185] INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:01.186] DEBUG: <PixTest.cc/efficiencyMaps:L407> eff result size = 4140543
[11:51:01.186] DEBUG: <PixTest.cc/efficiencyMaps:L412> Create hists highRate_C0 .. highRate_C15
[11:51:01.186] DEBUG: <PixTest.cc/efficiencyMaps:L426> booking xray maps for unmasked detector
[11:51:01.543] INFO: number of dead pixels (per ROC): 0 0 0 0 0 160 0 0 0 0 0 0 0 0 0 1
[11:51:01.543] INFO: number of red-efficiency pixels: 427 328 504 803 1305 1617 1144 963 582 1003 740 495 494 351 107 66
[11:51:01.543] INFO: number of X-ray hits detected: 214424 150600 217537 323751 361050 379089 398483 304922 290664 311376 307388 251619 262840 165048 69361 65992
[11:51:01.543] INFO: number of triggers sent (total per ROC): 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000 208000
[11:51:01.543] INFO: number of Vcal hits detected: 207520 207641 207371 207021 206245 197943 206539 206778 207331 206760 207150 207436 207441 207607 207885 207885
[11:51:01.543] INFO: Vcal hit fiducial efficiency (%): 99.8 99.8 99.7 99.6 99.2 99.1 99.4 99.5 99.7 99.5 99.6 99.8 99.8 99.8 99.9 100.0
[11:51:01.543] INFO: Vcal hit overall efficiency (%): 99.8 99.8 99.7 99.5 99.2 95.2 99.3 99.4 99.7 99.4 99.6 99.7 99.7 99.8 99.9 99.9
[11:51:01.543] INFO: X-ray hit rate [MHz/cm2]: 62.8 44.1 63.8 94.9 105.8 111.1 116.8 89.4 85.2 91.3 90.1 73.8 77.0 48.4 20.3 19.3
[11:51:01.543] INFO: PixTestHighRate::doXPixelAlive() done
[11:51:01.588] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: clk: 4
[11:51:01.588] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: ctr: 4
[11:51:01.588] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: sda: 19
[11:51:01.588] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: tin: 9
[11:51:01.588] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: level: 15
[11:51:01.588] DEBUG: <PixTestHighRate.cc/doXPixelAlive:L599> resetting: triggerdelay: 0
[11:51:01.589] INFO: PixTest:: pg_setup set to default.
[11:51:01.589] DEBUG: <PixTestHighRate.cc/~PixTestHighRate:L258> PixTestHighRate dtor
[11:51:01.607] INFO: enter test to run
[11:51:07.716] INFO: test: exit no parameter change
[11:51:07.717] DEBUG: <pXar.cc/main:L340> Final Analog Current: 392.3mA
[11:51:07.718] DEBUG: <pXar.cc/main:L341> Final Digital Current: 471.9mA
[11:51:07.718] DEBUG: <pXar.cc/main:L342> Final Module Temperature: 19.3 C
[11:51:07.718] DEBUG: <PixMonitor.cc/dumpSummaries:L39> PixMonitor::dumpSummaries
[11:51:07.976] QUIET: Connection to board 33 closed.
[11:51:07.977] INFO: pXar: this is the end, my friend
[11:51:07.977] DEBUG: <PixSetup.cc/~PixSetup:L68> PixSetup free fPxarMemory
MoReWeb-v0.5.1-904-gd94b9f2 on branch master